公开(公告)号：US20250118933A1

公开(公告)日：2025-04-10

申请号：US18989657

申请日：2024-12-20

Applicant: Intel Corporation

Inventor： Kai XIAO ,  Diego Mauricio CORTES HERNANDEZ ,  Luz Karine SANDOVAL GRANADOS ,  Jingbo LI ,  Raul ALCALA ARREOLA ,  Quresh BOHRA ,  Jose Manuel CANTOR GONZALEZ ,  Fabio RUIZ MOLINA ,  Carlos Guillermo TERRIQUEZ ARIAS ,  Adriana LOPEZ INIGUEZ

IPC: H01R13/6471 ,  H01R12/70 ,  H01R12/71 ,  H01R12/75 ,  H01R13/04

Abstract: Examples include techniques to improve signal integrity performance for a 3-connector design. The techniques include mounting a socket connector to a first side of a hot swap backplane such that pins of the first socket connector mirror pins of a second socket connector mounted to a second side of the hot swap backplane. The mirrored pins associated with routing data signals. The socket connector having a housing configured to receive a first plug connector of a cable assembly that has a second plug connector coupled with a processor baseboard socket connector.