公开(公告)号：US10958255B1

公开(公告)日：2021-03-23

申请号：US16727958

申请日：2019-12-27

Applicant: Intel Corporation

Inventor： Gil Asa ,  Assaf Ben-Bassat ,  Ofir Degani ,  Shahar Gross ,  Rotem Banin ,  Uri Grosglik

IPC: H03K5/00 ,  H03K5/133 ,  H03K5/156 ,  H03K5/1534 ,  G01R31/3177 ,  G01R31/3185

Abstract: This disclosure provides devices and methods for limiting the duration of pulses resulting from frequency modulation so as to provide for better propagation of a frequency doubler output within a communication device. The frequency doubler may be configured to receive a frequency doubler input and produce a modified frequency doubler output, wherein the frequency doubler includes a first flip-flop gate configured to receive a data input, a reset input, and a clock input and produce a first gate output; a first delay control configured to receive the gate output and produce a first delayed control output; and a first logic gate configured to receive the delayed control output and the frequency doubler input and produce a first logic gate output, wherein the modified frequency doubler output is based on the first logic gate output.