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公开(公告)号:US20240329873A1
公开(公告)日:2024-10-03
申请号:US18736227
申请日:2024-06-06
Applicant: Intel Corporation
Inventor: Ho-Ming LEUNG , Salma Mirza JOHNSON , Jackson ELLIS , Daniel Christian BIEDERMAN
IPC: G06F3/06
CPC classification number: G06F3/0656 , G06F3/0604 , G06F3/0679
Abstract: Examples described herein relate to a device that includes: a host interface; and circuitry to: based on allocation of a region in a buffer, wherein the buffer is associated with Non-volatile Memory Express over Fabrics (NVMe-oF) transactions: based on a first size of compressed data to be stored in the buffer, deallocate a portion of the region in the buffer and store the compressed data of the first size into a second portion of the region in the buffer and based on a second size of the compressed data to be stored in the buffer, utilize the allocated region in the buffer to store the compressed data of the second size.
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公开(公告)号:US20220086100A1
公开(公告)日:2022-03-17
申请号:US17535419
申请日:2021-11-24
Applicant: Intel Corporation
Inventor: Daniel Christian BIEDERMAN , Jin YAN , Ho-Ming LEUNG
IPC: H04L12/863
Abstract: Examples described herein relate to a network interface device. The network interface device can include circuitry to select a packet for transmission from among at least one time-based queue and at least one priority-based queue based on a departure time stamp value associated with the packet and a current time value. The network interface device can include circuitry to cause transmission of the selected packet. The circuitry can select a packet for transmission from the at least one time-based queue based on the current time value and based on the associated departure time stamp value.
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公开(公告)号:US20230045114A1
公开(公告)日:2023-02-09
申请号:US17966322
申请日:2022-10-14
Applicant: Intel Corporation
Inventor: Ho-Ming LEUNG , Daniel Christian BIEDERMAN
IPC: G06F3/06
Abstract: Examples described herein relate to a network interface device comprising an interface to memory and circuitry. In some examples, the circuitry is to: determine a number of data units stored in a page in the memory and based on no data unit stored in a page of memory, permit storage of a data unit in the page in the memory.
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