公开(公告)号：US20220115047A1

公开(公告)日：2022-04-14

申请号：US17560086

申请日：2021-12-22

Applicant: Intel Corporation

Inventor： Archanna Srinivasan ,  Arvind Tirumalai ,  Arch Zaliznyak ,  Gopal Iyer ,  Hon Khet Chuah ,  Arun Patel ,  Kok Kee Looi

IPC: G11C7/10 ,  G11C7/22

Abstract: An integrated circuit includes a first input/output lane comprising first external terminals and first driver circuits. The first driver circuits exchange signals with a first external device through the first external terminals as part of a first external interface. The first input/output lane is part of a sub-bank in an input/output bank that implements at least a part of the first external interface. The integrated circuit includes a second input/output lane comprising second external terminals and second driver circuits. The second driver circuits exchange signals with a second external device through the second external terminals as part of a second external interface. The second input/output lane is part of the sub-bank in the input/output bank that implements at least a part of the second external interface.