公开(公告)号：US20210048962A1

公开(公告)日：2021-02-18

申请号：US17084301

申请日：2020-10-29

Applicant: Intel Corporation

Inventor： Kapil Karkra ,  Mariusz Barczak ,  Michal Wysoczanski ,  Sanjeev Trika ,  James Guilmart

IPC: G06F3/06

Abstract: An embodiment of an electronic apparatus may include one or more substrates, and logic coupled to the one or more substrates, the logic to manage access to a storage system that includes a first persistent storage device and a second persistent storage device, capture input/output telemetry for a workload on the storage system, determine one or more write reduction factors and one or more write invalidation factors for the workload based on the captured input/output telemetry, and allocate storage for the workload between the first persistent storage device and the second persistent storage device based on the one or more write reduction factors and the one or more write invalidation factors. Other embodiments are disclosed and claimed.

公开(公告)号：US12093563B2

公开(公告)日：2024-09-17

申请号：US17084301

申请日：2020-10-29

Applicant: Intel Corporation

Inventor： Kapil Karkra ,  Mariusz Barczak ,  Michal Wysoczanski ,  Sanjeev Trika ,  James Guilmart

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/061 ,  G06F3/0688 ,  G06F2212/7201

Abstract: An embodiment of an electronic apparatus may include one or more substrates, and logic coupled to the one or more substrates, the logic to manage access to a storage system that includes a first persistent storage device and a second persistent storage device, capture input/output telemetry for a workload on the storage system, determine one or more write reduction factors and one or more write invalidation factors for the workload based on the captured input/output telemetry, and allocate storage for the workload between the first persistent storage device and the second persistent storage device based on the one or more write reduction factors and the one or more write invalidation factors. Other embodiments are disclosed and claimed.