公开(公告)号：US20230205244A1

公开(公告)日：2023-06-29

申请号：US17561109

申请日：2021-12-23

Applicant: Intel Corporation

Inventor： Anand Ramasundar ,  Cary Renzema ,  Fabrice Paillet ,  James Keith Hodgson ,  Po-Cheng Chen ,  Sergio Carlo Rodriguez ,  Harish K. Krishnamurthy ,  Jason Muhlestein

IPC: G05F1/575 ,  G05F1/565

CPC classification number: G05F1/575 ,  G05F1/565

Abstract: An apparatus, system, and method for digital voltage regulator (DVR) control are provided. A DVR includes comparators configured to determine whether VLOAD drops below a gradual non-linear control (NLC) undershoot threshold voltage, rises above or drops below a reference voltage, and rises above a gradual NLC overshoot threshold voltage, respectively, power gates (PGs) configured to adjust VOUT based on a provided PG code; and VR controller circuitry comprising synchronous LC circuitry configured to increase or decrease, by a first increment, the PG code responsive to the VLOAD dropping below the reference voltage and rising above the reference voltage, and asynchronous gradual NLC circuitry configured to increase or decrease, by a second increment greater than the first increment and less than half a maximum PG code value, the PG code responsive to the VLOAD dropping below the gradual NLC undershoot threshold voltage and rising above the gradual NLC overshoot threshold voltage.