公开(公告)号：US10902893B2

公开(公告)日：2021-01-26

申请号：US15809647

申请日：2017-11-10

Applicant: Intel Corporation

Inventor： Pramod Kolar ,  John Riley ,  Gunjan Pandya

IPC: G11C7/12 ,  G11C7/10 ,  G11C7/22 ,  G11C11/413 ,  G11C11/419

Abstract: A negative bitline write assist circuit includes a bias capacitor configured to facilitate driving the capacitance of a bitline. The negative bitline write assist circuit may be modularly replicated within a circuit to change the amount of negative voltage on the bitline during write operations. The bitline write assist circuit may be coupled directly to the bitline, removing the need to add a pull-down transistor to the write driver.

公开(公告)号：US10818326B2

公开(公告)日：2020-10-27

申请号：US15854549

申请日：2017-12-26

Applicant: Intel Corporation

Inventor： Pramod Kolar ,  John Riley ,  Gunjan Pandya

IPC: G11C7/12 ,  G11C7/10 ,  G11C7/22 ,  G11C11/413 ,  G11C11/419

Abstract: A negative bitline write assist circuit includes a bias capacitor configured to facilitate driving the capacitance of a bitline. The negative bitline write assist circuit may be modularly replicated within a circuit to change the amount of negative voltage on the bitline during write operations. The bitline write assist circuit may be coupled directly to the bitline, removing the need to add a pull-down transistor to the write driver.

公开(公告)号：US20180226109A1

公开(公告)日：2018-08-09

申请号：US15854549

申请日：2017-12-26

Applicant: Intel Corporation

Inventor： Pramod Kolar ,  John Riley ,  Gunjan Pandya

IPC: G11C7/12 ,  G11C7/10 ,  G11C7/22

Abstract: A negative bitline write assist circuit includes a bias capacitor configured to facilitate driving the capacitance of a bitline. The negative bitline write assist circuit may be modularly replicated within a circuit to change the amount of negative voltage on the bitline during write operations. The bitline write assist circuit may be coupled directly to the bitline, removing the need to add a pull-down transistor to the write driver.

公开(公告)号：US20180082722A1

公开(公告)日：2018-03-22

申请号：US15809647

申请日：2017-11-10

Applicant: Intel Corporation

Inventor： Pramod Kolar ,  John Riley ,  Gunjan Pandya

IPC: G11C7/12 ,  G11C7/10 ,  G11C7/22

CPC classification number: G11C7/12 ,  G11C7/10 ,  G11C7/1096 ,  G11C7/22

Abstract: A negative bitline write assist circuit includes a bias capacitor configured to facilitate driving the capacitance of a bitline. The negative bitline write assist circuit may be modularly replicated within a circuit to change the amount of negative voltage on the bitline during write operations. The bitline write assist circuit may be coupled directly to the bitline, removing the need to add a pull-down transistor to the write driver.

公开(公告)号：US20160267952A1

公开(公告)日：2016-09-15

申请号：US15162477

申请日：2016-05-23

Applicant: Intel Corporation

Inventor： Pramod Kolar ,  John Riley ,  Gunjan Pandya

IPC: G11C7/12 ,  G11C7/10 ,  G11C7/22

CPC classification number: G11C7/12 ,  G11C7/10 ,  G11C7/1096 ,  G11C7/22

Abstract: A negative bitline write assist circuit includes a bias capacitor configured to facilitate driving the capacitance of a bitline. The negative bitline write assist circuit may be modularly replicated within a circuit to change the amount of negative voltage on the bitline during write operations. The bitline write assist circuit may be coupled directly to the bitline, removing the need to add a pull-down transistor to the write driver.

Abstract translation: 负位线写入辅助电路包括被配置为有助于驱动位线的电容的偏置电容器。 负位线写辅助电路可以在电路内模块化复制，以在写操作期间改变位线上的负电压量。 位线写辅助电路可以直接耦合到位线，从而不需要向写驱动器添加下拉晶体管。

公开(公告)号：US09818460B2

公开(公告)日：2017-11-14

申请号：US15162477

申请日：2016-05-23

Applicant: Intel Corporation

Inventor： Pramod Kolar ,  John Riley ,  Gunjan Pandya

IPC: G11C7/12 ,  G11C7/10 ,  G11C7/22

CPC classification number: G11C7/12 ,  G11C7/10 ,  G11C7/1096 ,  G11C7/22

Abstract: A negative bitline write assist circuit includes a bias capacitor configured to facilitate driving the capacitance of a bitline. The negative bitline write assist circuit may be modularly replicated within a circuit to change the amount of negative voltage on the bitline during write operations. The bitline write assist circuit may be coupled directly to the bitline, removing the need to add a pull-down transistor to the write driver.