公开(公告)号：US20200226080A1

公开(公告)日：2020-07-16

申请号：US16833422

申请日：2020-03-27

Applicant: Intel Corporation

Inventor： Joseph D. TARANGO ,  Randal EIKE ,  Michael ALLISON ,  Eric HOFFMAN

IPC: G06F13/16 ,  G06F13/10 ,  G06F13/40 ,  G06F1/28

Abstract: A method is described. The method includes executing solid state drive program code from system memory of a computing system to perform any/all of garbage collection, wear leveling and logical block address to physical block address translation routines for a solid state drive that is coupled to a computing system that the system memory is a component of.

公开(公告)号：US20200225857A1

公开(公告)日：2020-07-16

申请号：US16831689

申请日：2020-03-26

Applicant: Intel Corporation

Inventor： Joseph D. TARANGO ,  Jim S. BACA

IPC: G06F3/06 ,  G06N5/04

Abstract: Examples may include techniques to predict or determine time-to-ready (TTR) for a storage device. TTR may be predicted or determined based on operating information included in a snapshot associated with a first time interval during operation of the storage device. The TTR predicted or determined indicates an amount of time the storage device will be at an operational state following a power loss recover of the storage device.