公开(公告)号：US20190044726A1

公开(公告)日：2019-02-07

申请号：US16024286

申请日：2018-06-29

Applicant: Intel Corporation

Inventor： Thiago Macieira ,  Ned M. Smith ,  Joseph Morrow

IPC: H04L9/32 ,  H04L29/08 ,  H04L12/24

Abstract: A system includes processing circuitry; and a memory device including instructions embodied thereon, wherein the instructions, which when executed by the processing circuitry, configure the processing circuitry to perform operations comprising: accessing input data, at an aggregator node, the input data including sensor data from a plurality of sensor nodes, each sensor data having a respective signature; validating the sensor data by using respective cryptographic hash functions on the sensor data and evaluating the respective result using the respective signature; performing an aggregation function on the sensor data to produce aggregate data; executing a hash function on the aggregate data to produce a hash value for the aggregate data bundling the sensor data, respective signatures of the sensor data, aggregate data, and hash value for the aggregate data in a data structure; and exposing the data structure to subscriber nodes on the IoT network.

公开(公告)号：US20210091958A1

公开(公告)日：2021-03-25

申请号：US17006398

申请日：2020-08-28

Applicant: Intel Corporation

Inventor： Thiago Macieira ,  Ned M. Smith ,  Joseph Morrow

IPC: H04L9/32 ,  H04L12/24 ,  H04L29/08 ,  H04W12/10

Abstract: A system includes processing circuitry; and a memory device including instructions embodied thereon, wherein the instructions, which when executed by the processing circuitry, configure the processing circuitry to perform operations comprising: accessing input data, at an aggregator node, the input data including sensor data from a plurality of sensor nodes, each sensor data having a respective signature; validating the sensor data by using respective cryptographic hash functions on the sensor data and evaluating the respective result using the respective signature; performing an aggregation function on the sensor data to produce aggregate data; executing a hash function on the aggregate data to produce a hash value for the aggregate data; bundling the sensor data, respective signatures of the sensor data, aggregate data, and hash value for the aggregate data in a data structure; and exposing the data structure to subscriber nodes on the IoT network.

公开(公告)号：US10764058B2

公开(公告)日：2020-09-01

申请号：US16024286

申请日：2018-06-29

Applicant: Intel Corporation

Inventor： Thiago Macieira ,  Ned M. Smith ,  Joseph Morrow

IPC: H04L29/06 ,  H04L9/32 ,  H04L12/24 ,  H04L29/08 ,  H04W12/10 ,  H04W4/70 ,  H04W12/06 ,  H04W12/00

Abstract: A system includes processing circuitry; and a memory device including instructions embodied thereon, wherein the instructions, which when executed by the processing circuitry, configure the processing circuitry to perform operations comprising: accessing input data, at an aggregator node, the input data including sensor data from a plurality of sensor nodes, each sensor data having a respective signature; validating the sensor data by using respective cryptographic hash functions on the sensor data and evaluating the respective result using the respective signature; performing an aggregation function on the sensor data to produce aggregate data; executing a hash function on the aggregate data to produce a hash value for the aggregate data bundling the sensor data, respective signatures of the sensor data, aggregate data, and hash value for the aggregate data in a data structure; and exposing the data structure to subscriber nodes on the IoT network.

公开(公告)号：US11695565B2

公开(公告)日：2023-07-04

申请号：US17006398

申请日：2020-08-28

Applicant: Intel Corporation

Inventor： Thiago Macieira ,  Ned M. Smith ,  Joseph Morrow

IPC: H04L29/06 ,  H04L9/32 ,  H04L41/12 ,  H04L67/12 ,  H04L41/5003 ,  H04L67/04 ,  H04W12/106 ,  H04L67/566 ,  H04L9/40 ,  H04W12/61 ,  H04W12/069

CPC classification number: H04L9/3239 ,  H04L9/3247 ,  H04L9/3297 ,  H04L41/12 ,  H04L41/5003 ,  H04L67/04 ,  H04L67/12 ,  H04L67/566 ,  H04W12/106 ,  H04L63/0823 ,  H04W12/069 ,  H04W12/61

Abstract: A system includes processing circuitry; and a memory device including instructions embodied thereon, wherein the instructions, which when executed by the processing circuitry, configure the processing circuitry to perform operations comprising: accessing input data, at an aggregator node, the input data including sensor data from a plurality of sensor nodes, each sensor data having a respective signature; validating the sensor data by using respective cryptographic hash functions on the sensor data and evaluating the respective result using the respective signature; performing an aggregation function on the sensor data to produce aggregate data; executing a hash function on the aggregate data to produce a hash value for the aggregate data; bundling the sensor data, respective signatures of the sensor data, aggregate data, and hash value for the aggregate data in a data structure; and exposing the data structure to subscriber nodes on the IoT network.