ALGORITHM FOR ASSESSMENT OF FORWARD BIASED JUNCTIONS DETECTED DURING CIRCUIT OPERATION

    公开(公告)号:US20250004035A1

    公开(公告)日:2025-01-02

    申请号:US18343763

    申请日:2023-06-29

    Abstract: A non-transitory computer readable medium is provided. The non-transitory computer readable medium having instructions stored therein that when executed by a processor cause the processor to: receive current information of a semiconductor device, calculate an absolute current value of the semiconductor device from the current information and compare the absolute current value with a first threshold; receive information regarding a duration of a forward bias of the semiconductor device and compare the duration with a second threshold if the absolute current value is more than the first threshold; perform a layout review of tap spacing of selected semiconductor device components; and output safe operation area (SOA) information indicating a forward bias junction result based on the absolute current value, the duration of forward bias and the layout review.

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