公开(公告)号：US11082241B2

公开(公告)日：2021-08-03

申请号：US15941050

申请日：2018-03-30

Applicant: Intel Corporation

Inventor： Manoj Sachdev ,  Vikram Suresh ,  Sanu Mathew ,  Sudhir Satpathy

IPC: H04L9/32 ,  H04L9/08 ,  G06F9/30 ,  G06F21/44 ,  G09C1/00 ,  H03M7/30

Abstract: An embodiment of a semiconductor package apparatus may include technology to generate a first output from a physically unclonable function (PUF) based on a challenge, modify the challenge based on the first output, and generate a response based on the modified challenge. Some embodiments may additionally or alternatively include technology to change a read sequence of the PUF based on an output of the PUF. Some embodiments may additionally or alternatively include technology to vary a latency of a linear feedback shift register based on an output from the PUF. Other embodiments are disclosed and claimed.

公开(公告)号：US11483167B2

公开(公告)日：2022-10-25

申请号：US16447887

申请日：2019-06-20

Applicant: Intel Corporation

Inventor： Vikram B. Suresh ,  Manoj Sachdev ,  Sanu K. Mathew ,  Sudhir K. Satpathy

IPC: H04L9/32 ,  G06F7/58

Abstract: Physically unclonable functions response in memory cells is improved by transistor sizing, transistor threshold voltage (VT) and body bias in the memory cell to improve the reproducibility of the memory cell and multiple Sense Amplifiers (SA) per column to further enhance physically unclonable function entropy. A physically unclonable function exploits a large number of read-sequence-order combinations available in a physically unclonable function memory array to generate an exponentially large challenge-response pair space, without incurring the area and energy costs of hosting and operating an exponentially large memory array.

公开(公告)号：US20190044739A1

公开(公告)日：2019-02-07

申请号：US15941050

申请日：2018-03-30

Applicant: Intel Corporation

Inventor： Manoj Sachdev ,  Vikram Suresh ,  Sanu Mathew ,  Sudhir Satpathy

IPC: H04L9/32 ,  H04L9/08 ,  G06F21/44 ,  G06F9/30 ,  H03M7/30

Abstract: An embodiment of a semiconductor package apparatus may include technology to generate a first output from a physically unclonable function (PUF) based on a challenge, modify the challenge based on the first output, and generate a response based on the modified challenge. Some embodiments may additionally or alternatively include technology to change a read sequence of the PUF based on an output of the PUF. Some embodiments may additionally or alternatively include technology to vary a latency of a linear feedback shift register based on an output from the PUF. Other embodiments are disclosed and claimed.