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公开(公告)号:US20220150055A1
公开(公告)日:2022-05-12
申请号:US17437342
申请日:2019-04-19
Applicant: Intel Corporation
Inventor: Bo CUI , Cunming LIANG , Jr-Shian TSAI , Ping YU , Xiaobing QIAN , Xuekun HU , Lin LUO , Shravan NAGRAJ , Xiaowen ZHANG , Mesut A. ERGIN , Tsung-Yuan C. TAI , Andrew J. HERDRICH
Abstract: In some examples, for process-to-process communication, such as in function linking, a virtual channel can be provisioned to provide virtual machine to virtual machine communications. In response to a transmit request from a source virtual machine, the virtual channel can cause a data copy from a source buffer associated with the source virtual machine without decryption or encryption. The virtual channel provisions a key identifier for the copied data. The destination virtual machine can receive an indication data is available and can cause the data to be decrypted using a key accessed using the key identifier and source address of the copied data. In addition, the data can be encrypted using a second, different key for storage in a destination buffer associated with the destination virtual machine. In some examples, the key identifier and source address is managed by the virtual channel and is not visible to virtual machine or hypervisor.
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公开(公告)号:US20210203740A1
公开(公告)日:2021-07-01
申请号:US16328865
申请日:2016-09-30
Applicant: INTEL CORPORATION
Inventor: Huawei XIE , Jun NAKAJIMA , David E. COHEN , Mesut A. ERGIN , Wei WANG
IPC: H04L29/08 , H04L12/861 , G06F9/455
Abstract: Technologies for managing paravirtual network device queue and memory of a network computing device that includes multi-core processor, a multi-layer cache, a host, and a plurality of virtual machine instances. The host is assigned a processor core of the processor and may be configured to copy a received network packet to a last level cache of the multi-layer cache and determine one or more virtual machine instances configured to process the received network packet. Each virtual machine instance has been assigned a processor core of the processor and has been allocated a first level cache of the multi-level cache memory associated with the respective processor core. The host is additionally configured to inject an interrupt into each processor core of the determined virtual machine (s) which indicates to the virtual machine instance (s) that the received network packet is available to be processed.
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