公开(公告)号：US10430313B2

公开(公告)日：2019-10-01

申请号：US14864597

申请日：2015-09-24

Applicant: Intel Corporation

Inventor： Norbert Schulz ,  Frank Penczek ,  Joseph E. Wylder ,  Eran Geva

IPC: G06F1/00 ,  G06F11/34

Abstract: Generally, this disclosure provides systems, methods and computer readable media for correlation of OS and hardware events to provide a corrected trace sequence. A system may include a processor configured to receive an OS event at a first time, generate a first timestamp based on a first clock associated with the OS, buffer the OS event until a second time, and generate a second timestamp based on the first clock. The system may also include a trace generation circuit configured to receive the OS event from the processor after the second time and generate a third timestamp based on a second clock associated with the trace generation circuit. The system may further include a trace correction circuit configured to calculate a corrected timestamp for the OS event based on differences between the first, second and third timestamps and further based on the relative frequency between the first and second clocks.