公开(公告)号：US20200251464A1

公开(公告)日：2020-08-06

申请号：US16263093

申请日：2019-01-31

Applicant: Intel Corporation

Inventor： Srinivasa Chaitanya GADIGATLA ,  Ranjith KUMAR ,  Marni NABORS ,  Quan PHAN

IPC: H01L27/02 ,  H01L27/118 ,  H01L23/528

Abstract: An integrated circuit structure includes a cell on a metal level, the cell defined by a cell boundary. A plurality of substantially parallel interconnect lines are inside the cell boundary. A first power track and a second power track are both dedicated to power and are located completely inside the cell boundary without any power tracks along the cell boundary on the metal level.