公开(公告)号：US20220269330A1

公开(公告)日：2022-08-25

申请号：US17662852

申请日：2022-05-11

Applicant: Intel Corporation

Inventor： AHMED ABOU-ALFOTOUH ,  PHANI KUMAR KANDULA ,  LINDA L. HURD ,  ERIC C. SAMSON ,  SRIKRISHNAN VENKATARAMAN

IPC: G06F1/3234

Abstract: A system includes multiple processors and a power controller. Each processor includes a throttling engine. The power controller is to, in response to a determination that a first power consumption level exceeds a first threshold, assert a critical signal to each throttling engine of the plurality of processors. Further, for each processor, the throttling engine of the processor is to perform a sequence of multiple throttling states while the critical signal is asserted by the power controller, where the sequence of multiple throttling states is performed according to a state machine of the throttling engine. Other embodiments are described and claimed.

公开(公告)号：US20210405729A1

公开(公告)日：2021-12-30

申请号：US16914290

申请日：2020-06-27

Applicant: Intel Corporation

Inventor： AHMED ABOU-ALFOTOUH ,  PHANI KUMAR KANDULA ,  LINDA L. HURD ,  ERIC C. SAMSON ,  SRIKRISHNAN VENKATARAMAN

IPC: G06F1/3234

Abstract: A system includes multiple processors and a power controller. Each processor includes a throttling engine. The power controller is to, in response to a determination that a first power consumption level exceeds a first threshold, assert a critical signal to each throttling engine of the plurality of processors. Further, for each processor, the throttling engine of the processor is to perform a sequence of multiple throttling states while the critical signal is asserted by the power controller, where the sequence of multiple throttling states is performed according to a state machine of the throttling engine. Other embodiments are described and claimed.