公开(公告)号：US20230071699A1

公开(公告)日：2023-03-09

申请号：US17470993

申请日：2021-09-09

Applicant: Intel Corporation

Inventor： Andrew Smith ,  Brian Greene ,  Seonghyun Paik ,  Omair Saadat ,  Chung-Hsun Lin ,  Tahir Ghani

IPC: H01L29/423 ,  H01L29/786 ,  H01L27/092 ,  H01L29/06 ,  H01L21/8238

Abstract: A transistor structure includes a channel region including first sidewall. A gate electrode includes a first layer having a first portion adjacent to the first sidewall and a second portion adjacent to a gate electrode boundary sidewall. The gate electrode includes a second layer between the first and second portions of the first layer. The first layer has a first composition associated with a first work function material, and has a first lateral thickness from the first sidewall. The second layer has a second composition associated with a second work function material. Depending one a second lateral thickness of the second layer, the second layer may modulate a threshold voltage (VT) of the transistor structure by more or less. In some embodiments, a ratio of the second lateral thickness to the first lateral thickness is less than three.