公开(公告)号：US10263663B2

公开(公告)日：2019-04-16

申请号：US14973163

申请日：2015-12-17

Applicant: Intel Corporation

Inventor： Shiva Kiran ,  Tzu-Chien Hsueh ,  James E. Jaussi

IPC: H04B1/00 ,  H04B3/14 ,  H04B14/02

Abstract: Some embodiments include apparatus and methods using an input node, an analog to digital converter (ADC) including an input coupled to the input node, a first feedforward equalizer (FFE) including an input coupled to an output of the ADC, a second FFE including an input coupled to the output of the ADC, and a decision feedback equalizer (DFE) including a first input, a second input, and an output, the first input coupled to an output of the first FFE, and the second input coupled to an output of the second FFE.

公开(公告)号：US20170180002A1

公开(公告)日：2017-06-22

申请号：US14973163

申请日：2015-12-17

Applicant: Intel Corporation

Inventor： Shiva Kiran ,  Tzu-Chien Hsueh ,  James E. Jaussi

IPC: H04B3/14 ,  H04B14/02 ,  H04B1/00

CPC classification number: H04B3/145 ,  H04B1/0007 ,  H04B14/023

Abstract: Some embodiments include apparatus and methods using an input node, an analog to digital converter (ADC) including an input coupled to the input node, a first feedforward equalizer (FFE) including an input coupled to an output of the ADC, a second FFE including an input coupled to the output of the ADC, and a decision feedback equalizer (DFE) including a first input, a second input, and an output, the first input coupled to an output of the first FFE, and the second input coupled to an output of the second FFE.