公开(公告)号：US20180145063A1

公开(公告)日：2018-05-24

申请号：US15574813

申请日：2015-06-24

Applicant: Intel Corporation

Inventor： Donald W. NELSON ,  Patrick MORROW ,  Steven M. BURNS

IPC: H01L27/02 ,  G06F17/50 ,  H01L27/118 ,  H01L23/528

CPC classification number: H01L27/0207 ,  G06F17/5068 ,  H01L23/5286 ,  H01L27/11807 ,  H01L2027/11875

Abstract: An integrated circuit layout is described that uses a library cells with alternating conducting lines. One embodiment includes a first cell and a second cell, the second cell being adjacent to the first cell. The first cell has a first plurality of conductive lines, a first portion of the first plurality having line ends that are a first distance from the second cell. The second cell has a second plurality of conductive lines, the conductive lines being parallel to and aligned with the conductive lines in the first cell, a second portion of the second plurality having line ends that are a second distance from the first cell. The first distance is shorter than the second distance.