公开(公告)号：US10885384B2

公开(公告)日：2021-01-05

申请号：US16232715

申请日：2018-12-26

Applicant: Intel Corporation

Inventor： Gilad Michael ,  Sushma Rao

IPC: G06K9/62 ,  G06K9/00 ,  G06K9/46 ,  G06K9/54 ,  G06T5/20

Abstract: Techniques related to computer vision tasks are discussed. Such techniques include applying a pretrained non-linear transform and pretrained details boosting factor to generate an enhanced image from an input image and reducing the bit depth of the enhanced image prior to applying a pretrained computer vision network to perform the computer vision task.

公开(公告)号：US20200074691A1

公开(公告)日：2020-03-05

申请号：US16674512

申请日：2019-11-05

Applicant: INTEL CORPORATION

Inventor： Masayoshi Asama ,  Furkan Isikdogan ,  Sushma Rao ,  Avi Kalderon ,  Chyuan-Tyng Wu ,  Bhavin Nayak ,  Joao Peralta Moreira ,  Pavel Kounitsky ,  Ben Berlin ,  Gilad Michael

IPC: G06T9/00 ,  G06T3/40 ,  G06T1/20 ,  G06T5/00 ,  G06T5/20

Abstract: An example apparatus for processing images includes a hybrid infinite impulse response—finite impulse response (IIR-FIR) convolution block to receive an image and generate processed image information. The hybrid IIR-FIR convolution block includes a vertical infinite impulse response (IIR) component to approximate a vertical convolution when processing the image.

公开(公告)号：US20190130208A1

公开(公告)日：2019-05-02

申请号：US16232715

申请日：2018-12-26

Applicant: Intel Corporation

Inventor： Gilad Michael ,  Sushma Rao

IPC: G06K9/54 ,  G06T5/20 ,  G06K9/62

Abstract: Techniques related to computer vision tasks are discussed. Such techniques include applying a pretrained non-linear transform and pretrained details boosting factor to generate an enhanced image from an input image and reducing the bit depth of the enhanced image prior to applying a pretrained computer vision network to perform the computer vision task.

公开(公告)号：US11302035B2

公开(公告)日：2022-04-12

申请号：US16674512

申请日：2019-11-05

Applicant: INTEL CORPORATION

Inventor： Masayoshi Asama ,  Furkan Isikdogan ,  Sushma Rao ,  Avi Kalderon ,  Chyuan-Tyng Wu ,  Bhavin Nayak ,  Joao Peralta Moreira ,  Pavel Kounitsky ,  Ben Berlin ,  Gilad Michael

IPC: G06T9/00 ,  G06T3/40 ,  G06T1/20 ,  G06T5/00 ,  G06T5/20

Abstract: An example apparatus for processing images includes a hybrid infinite impulse response-finite impulse response (IIR-FIR) convolution block to receive an image and generate processed image information. The hybrid IIR-FIR convolution block includes a vertical infinite impulse response (IIR) component to approximate a vertical convolution when processing the image.

公开(公告)号：US10755425B2

公开(公告)日：2020-08-25

申请号：US16116318

申请日：2018-08-29

Applicant: Intel Corporation

Inventor： Jun Nishimura ,  Timo Gerasimow ,  Sushma Rao ,  Chyuan-Tyng Wu ,  Aleksandar Sutic ,  Gilad Michael

IPC: G06T7/33 ,  H04N5/213 ,  H04N5/357 ,  H04N5/232 ,  G06T5/00 ,  G06T5/50

Abstract: A mechanism is described for facilitating automatic tuning of image signal processors using reference images in image processing environments, according to one embodiment. A method of embodiments, as described herein, includes one or more processors to: receive images associated with one or more scenes captured by one or more cameras; access tuning parameters associated with functionalities within an image signal processor (ISP) pipeline; generate reference images based on the tuning parameters, wherein a reference image is associated with an image for each functionality within the ISP pipeline; and automatically tune the ISP pipeline based on selection of one or more of the reference images for one or more of the images for one or more of the functionalities.