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1.发明申请公开(公告)号：US20200074691A1
公开(公告)日：2020-03-05
申请号：US16674512
申请日：2019-11-05
Applicant: INTEL CORPORATION
Inventor： Masayoshi Asama , Furkan Isikdogan , Sushma Rao , Avi Kalderon , Chyuan-Tyng Wu , Bhavin Nayak , Joao Peralta Moreira , Pavel Kounitsky , Ben Berlin , Gilad Michael
Abstract: An example apparatus for processing images includes a hybrid infinite impulse response—finite impulse response (IIR-FIR) convolution block to receive an image and generate processed image information. The hybrid IIR-FIR convolution block includes a vertical infinite impulse response (IIR) component to approximate a vertical convolution when processing the image.
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公开(公告)号：US11868892B2
公开(公告)日：2024-01-09
申请号：US17887359
申请日：2022-08-12
Applicant: INTEL CORPORATION
Inventor： Furkan Isikdogan , Bhavin V. Nayak , Joao Peralta Moreira , Chyuan-Tyng Wu , Gilad Michael
IPC: G06N3/08 , G06V10/70 , G06V10/764 , G06N3/063 , G06F18/214 , G06N3/048 , G06V10/774 , G06V10/776 , G06V10/82
CPC classification number: G06N3/08 , G06F18/214 , G06N3/048 , G06N3/063 , G06V10/70 , G06V10/764 , G06V10/774 , G06V10/776 , G06V10/82
Abstract: An apparatus to facilitate partially-frozen neural networks for efficient computer vision systems is disclosed. The apparatus includes a frozen core to store fixed weights of a machine learning model, one or more trainable cores coupled to the frozen core, the one or more trainable cores comprising multipliers for trainable weights of the machine learning model, and wherein the alpha blending layer includes a trainable alpha blending parameter, and wherein the trainable alpha blending parameter is a function of a trainable parameter, a sigmoid function, and outputs of frozen and trainable blocks in a preceding layer of the machine learning model.
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公开(公告)号：US11880763B2
公开(公告)日：2024-01-23
申请号：US16886103
申请日：2020-05-28
Applicant: Intel Corporation
Inventor： Furkan Isikdogan , Bhavin V. Nayak , Joao Peralta Moreira , Chyuan-Tyng Wu , Gilad Michael
IPC: G06N3/08 , G06V10/70 , G06V10/764 , G06N3/063 , G06F18/214 , G06N3/048 , G06V10/774 , G06V10/776 , G06V10/82
CPC classification number: G06N3/08 , G06F18/214 , G06N3/048 , G06N3/063 , G06V10/70 , G06V10/764 , G06V10/774 , G06V10/776 , G06V10/82
Abstract: An apparatus to facilitate partially-frozen neural networks for efficient computer vision systems is disclosed. The apparatus includes a frozen core to store fixed weights of a machine learning model, one or more trainable cores coupled to the frozen core, the one or more trainable cores comprising multipliers for trainable weights of the machine learning model, and wherein the alpha blending layer includes a trainable alpha blending parameter, and wherein the trainable alpha blending parameter is a function of a trainable parameter, a sigmoid function, and outputs of frozen and trainable blocks in a preceding layer of the machine learning model.
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公开(公告)号：US20220391680A1
公开(公告)日：2022-12-08
申请号：US17887359
申请日：2022-08-12
Applicant: INTEL CORPORATION
Inventor： Furkan Isikdogan , Bhavin V. Nayak , Joao Peralta Moreira , Chyuan-Tyng Wu , Gilad Michael
Abstract: An apparatus to facilitate partially-frozen neural networks for efficient computer vision systems is disclosed. The apparatus includes a frozen core to store fixed weights of a machine learning model, one or more trainable cores coupled to the frozen core, the one or more trainable cores comprising multipliers for trainable weights of the machine learning model, and wherein the alpha blending layer includes a trainable alpha blending parameter, and wherein the trainable alpha blending parameter is a function of a trainable parameter, a sigmoid function, and outputs of frozen and trainable blocks in a preceding layer of the machine learning model.
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公开(公告)号：US20200293870A1
公开(公告)日：2020-09-17
申请号：US16886103
申请日：2020-05-28
Applicant: Intel Corporation
Inventor： Furkan Isikdogan , Bhavin V. Nayak , Joao Peralta Moreira , Chyuan-Tyng Wu , Gilad Michael
Abstract: An apparatus to facilitate partially-frozen neural networks for efficient computer vision systems is disclosed. The apparatus includes a frozen core to store fixed weights of a machine learning model, one or more trainable cores coupled to the frozen core, the one or more trainable cores comprising multipliers for trainable weights of the machine learning model, and wherein the alpha blending layer includes a trainable alpha blending parameter, and wherein the trainable alpha blending parameter is a function of a trainable parameter, a sigmoid function, and outputs of frozen and trainable blocks in a preceding layer of the machine learning model.
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Patent Agency Ranking
6.发明授权公开(公告)号：US12298834B2
公开(公告)日：2025-05-13
申请号：US17448692
申请日：2021-09-23
Applicant: Intel Corporation
Inventor： Shravan Kumar Belagal Math , Chyuan-Tyng Wu , Vishal R. Sinha , Paul S. Diefenbaugh , Kunjal Parikh , Malhar N. Bhatt
IPC: G09G5/00 , G06F1/3234 , G06F3/14 , G09G5/10
Abstract: Methods, apparatus, systems, and articles of manufacture to control an aggressiveness of display panel power savings are disclosed. An example apparatus include a display panel, a display controller to adjust an image to be displayed by the display panel, and a power savings controller to access an image provided to the display controller, execute a machine learning model using the image as an input to generate an aggressiveness value, and provide the aggressiveness value to the display controller, the display controller to adjust the image based on the aggressiveness value.
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公开(公告)号：US20240127396A1
公开(公告)日：2024-04-18
申请号：US18397751
申请日：2023-12-27
Applicant: Intel Corporation
Inventor： Petrus Van Beek , Chyuan-Tyng Wu
IPC: G06T3/4053 , G06T3/4046
CPC classification number: G06T3/4053 , G06T3/4046
Abstract: Systems, apparatus, articles of manufacture, and methods are disclosed to generate super-resolution upscaling. An example apparatus to process an image disclosed herein includes interface circuitry to accept input image data with a first resolution, machine readable instructions, and programmable circuitry to at least one of instantiate or execute the machine readable instructions to upscale the input image data based on an upscale factor to generate intermediate image data with a second resolution higher than the first resolution, process the input image data with a neural network to produce neural network output data with a number of channels per pixel that is based on the upscale factor, combine the intermediate image and the neural network output data to generate output image data with the second resolution.
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公开(公告)号：US11409986B2
公开(公告)日：2022-08-09
申请号：US16232336
申请日：2018-12-26
Applicant: INTEL CORPORATION
Inventor： Chaitanya R. Gandra , Chyuan-Tyng Wu , Gilad Michael , Liron Ain-Kedem , Leo Isikdogan
Abstract: An example apparatus for processing images includes a trainable vision scaler to receive an image. The trainable vision scaler is to generate output including a feature map or an enhanced image based on the image. The trainable vision scaler is to transmit the output to a computer vision network. The computer vision network is trained to perform a computer vision task using the output.
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公开(公告)号：US11302035B2
公开(公告)日：2022-04-12
申请号：US16674512
申请日：2019-11-05
Applicant: INTEL CORPORATION
Inventor： Masayoshi Asama , Furkan Isikdogan , Sushma Rao , Avi Kalderon , Chyuan-Tyng Wu , Bhavin Nayak , Joao Peralta Moreira , Pavel Kounitsky , Ben Berlin , Gilad Michael
Abstract: An example apparatus for processing images includes a hybrid infinite impulse response-finite impulse response (IIR-FIR) convolution block to receive an image and generate processed image information. The hybrid IIR-FIR convolution block includes a vertical infinite impulse response (IIR) component to approximate a vertical convolution when processing the image.
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10.发明授权公开(公告)号：US10755425B2
公开(公告)日：2020-08-25
申请号：US16116318
申请日：2018-08-29
Applicant: Intel Corporation
Inventor： Jun Nishimura , Timo Gerasimow , Sushma Rao , Chyuan-Tyng Wu , Aleksandar Sutic , Gilad Michael
Abstract: A mechanism is described for facilitating automatic tuning of image signal processors using reference images in image processing environments, according to one embodiment. A method of embodiments, as described herein, includes one or more processors to: receive images associated with one or more scenes captured by one or more cameras; access tuning parameters associated with functionalities within an image signal processor (ISP) pipeline; generate reference images based on the tuning parameters, wherein a reference image is associated with an image for each functionality within the ISP pipeline; and automatically tune the ISP pipeline based on selection of one or more of the reference images for one or more of the images for one or more of the functionalities.
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