公开(公告)号：US20230315630A1

公开(公告)日：2023-10-05

申请号：US17708435

申请日：2022-03-30

Applicant: Intel Corporation

Inventor： Hanna Alam ,  Yuval Bustan ,  Tomer Exterman ,  Dor Kahana ,  Larisa Novakovsky ,  Joseph Nuzman

IPC: G06F12/0811

CPC classification number: G06F12/0811 ,  G06F2212/62

Abstract: Methods and apparatus relating to a dynamic inclusive and non-inclusive caching policy are described. In an embodiment, a first cache has a higher level than a second cache. Circuitry determines a caching policy between the first cache and the second cache based on a comparison of a number of active processor cores and a threshold value. The caching policy is one of an inclusive caching policy or a non-inclusive caching policy. Other embodiments are also disclosed and claimed.