公开(公告)号：US20180181329A1

公开(公告)日：2018-06-28

申请号：US15392638

申请日：2016-12-28

Applicant: Intel Corporation

Inventor： Ishwar S. Bhati ,  Udit Dhawan ,  Jayesh Gaur ,  Sreenivas Subramoney

IPC: G06F3/06 ,  G06F12/0897

CPC classification number: G06F12/0897 ,  G06F9/3824 ,  G06F12/0811 ,  G06F2212/1041 ,  G06F2212/1056 ,  G06F2212/302

Abstract: Processor, apparatus, and method for reordering a stream of memory access requests to establish locality are described herein. One embodiment of a method includes: storing in a request queue memory access requests generated by a plurality of execution units, the memory access requests comprising a first request to access a first memory page in a memory and a second request to access a second memory page in the memory; maintaining a list of unique memory pages, each unique memory page associated with one or more memory access requests stored the request queue and is to be accessed by the one or more memory access requests; selecting a current memory page from the list of unique memory pages; and dispatching from the request queue to the memory, all memory access requests associated with the current memory page before any other memory access request in the request queue is dispatched.