公开(公告)号：US12057369B2

公开(公告)日：2024-08-06

申请号：US18088478

申请日：2022-12-23

Applicant: Intel Corporation

Inventor： Weston Bertrand ,  Kyle Arrington ,  Shankar Devasenathipathy ,  Aaron McCann ,  Nicholas Neal ,  Zhimin Wan

IPC: H01L23/433 ,  H01L23/367 ,  H01L25/065

CPC classification number: H01L23/433 ,  H01L23/3675 ,  H01L25/0657

Abstract: Embodiments of the present disclosure may generally relate to systems, apparatuses, techniques, and/or processes directed to packages that include stacked dies that use thermal conductivity features including thermally conductive through silicon vias (TSVs) filled with thermally conductive material located in passive areas of a first die to route heat from a first die away from a second die that is coupled with the first die. In embodiments, the first die may be referred to as a base die. Embodiments may include thermal blocks in the form of dummy dies that include TSVs at least partially filled with thermal energy conducting material such as copper, solder, or other alloy.

公开(公告)号：US12266589B2

公开(公告)日：2025-04-01

申请号：US18635894

申请日：2024-04-15

Applicant: Intel Corporation

Inventor： Weston Bertrand ,  Kyle Arrington ,  Shankar Devasenathipathy ,  Aaron McCann ,  Nicholas Neal ,  Zhimin Wan

IPC: H01L23/433 ,  H01L23/367 ,  H01L25/065

Abstract: Embodiments of the present disclosure may generally relate to systems, apparatuses, techniques, and/or processes directed to packages that include stacked dies that use thermal conductivity features including thermally conductive through silicon vias (TSVs) filled with thermally conductive material located in passive areas of a first die to route heat from a first die away from a second die that is coupled with the first die. In embodiments, the first die may be referred to as a base die. Embodiments may include thermal blocks in the form of dummy dies that include TSVs at least partially filled with thermal energy conducting material such as copper, solder, or other alloy.

公开(公告)号：US11854935B2

公开(公告)日：2023-12-26

申请号：US16794789

申请日：2020-02-19

Applicant: Intel Corporation

Inventor： Weston Bertrand ,  Kyle Arrington ,  Shankar Devasenathipathy ,  Aaron McCann ,  Nicholas Neal ,  Zhimin Wan

IPC: H01L23/433 ,  H01L25/065 ,  H01L23/367

CPC classification number: H01L23/433 ,  H01L23/3675 ,  H01L25/0657

Abstract: Embodiments of the present disclosure may generally relate to systems, apparatuses, techniques, and/or processes directed to packages that include stacked dies that use thermal conductivity features including thermally conductive through silicon vias (TSVs) filled with thermally conductive material located in passive areas of a first die to route heat from a first die away from a second die that is coupled with the first die. In embodiments, the first die may be referred to as a base die. Embodiments may include thermal blocks in the form of dummy dies that include TSVs at least partially filled with thermal energy conducting material such as copper, solder, or other alloy.