公开(公告)号：US20170289646A1

公开(公告)日：2017-10-05

申请号：US15089118

申请日：2016-04-01

Applicant: Intel Corporation

Inventor： Chanitnan (Lu) Kanthapanit ,  Richard Newpol ,  Joseph A. Hook ,  Ramkumar Narayanswamy ,  Sheldon L. Sun ,  Kevin M. Taggart ,  Christopher T. Sauvageau ,  Rao S. Pitla ,  Yassir Mosleh

IPC: H04N21/8547 ,  H04R1/32 ,  H04N5/247 ,  H04N5/067 ,  H04N5/05

CPC classification number: H04N21/8547 ,  H04N5/05 ,  H04N5/0675 ,  H04N5/247 ,  H04N21/234 ,  H04N21/242 ,  H04R1/326 ,  H04R1/406 ,  H04R3/005 ,  H04R2499/11

Abstract: A method and apparatus for synchronizing data captured by multiple image and non-image data capture devices using timing information. In one embodiment, the device comprises a plurality of interfaces operable to receive streaming data from each of a plurality of image and non-image capture devices and timestamping logic implemented, at least in part, in hardware and coupled to the plurality of interfaces to generate and assign timestamp information to each set of data captured by individual capture devices of the plurality of image and non-image capture devices to indicate when the data was captured, where the timestamp information is synchronized to a single timestamp reference clock. The device also comprises processing logic coupled to the timestamping logic to group image data from image capture devices with data from non-image capture devices using the timestamp information.

公开(公告)号：US09813783B2

公开(公告)日：2017-11-07

申请号：US15089118

申请日：2016-04-01

Applicant: Intel Corporation

Inventor： Chanitnan (Lu) Kanthapanit ,  Richard Newpol ,  Joseph A. Hook ,  Ramkumar Narayanswamy ,  Sheldon L. Sun ,  Kevin M. Taggart ,  Christopher T. Sauvageau ,  Rao S. Pitla ,  Yassir Mosleh

IPC: H04N9/475 ,  H04N21/8547 ,  H04N5/067 ,  H04N5/05 ,  H04N5/247 ,  H04R1/32

CPC classification number: H04N21/8547 ,  H04N5/05 ,  H04N5/0675 ,  H04N5/247 ,  H04N21/234 ,  H04N21/242 ,  H04R1/326 ,  H04R1/406 ,  H04R3/005 ,  H04R2499/11

Abstract: A method and apparatus for synchronizing data captured by multiple image and non-image data capture devices using timing information. In one embodiment, the device comprises a plurality of interfaces operable to receive streaming data from each of a plurality of image and non-image capture devices and timestamping logic implemented, at least in part, in hardware and coupled to the plurality of interfaces to generate and assign timestamp information to each set of data captured by individual capture devices of the plurality of image and non-image capture devices to indicate when the data was captured, where the timestamp information is synchronized to a single timestamp reference clock. The device also comprises processing logic coupled to the timestamping logic to group image data from image capture devices with data from non-image capture devices using the timestamp information.

公开(公告)号：US20190050522A1

公开(公告)日：2019-02-14

申请号：US16155039

申请日：2018-10-09

Applicant: Intel Corporation

Inventor： Ignacio Alvarez ,  Patrick Mead ,  Carlos Ornelas ,  Daniel Lake ,  Miryam Lomeli Barajas ,  Victor Palacios Rivera ,  Yassir Mosleh ,  David Arditti Ilitzky ,  John Tell ,  Paul H. Dormitzer

IPC: G06F17/50 ,  G05D1/00 ,  G06F15/173

Abstract: Methods and apparatus relating to heterogeneous compute architecture hardware/software co-design for autonomous driving are described. In one embodiment, a heterogeneous compute architecture for autonomous driving systems (also interchangeably referred to herein as Heterogeneous Compute Architecture or “HCA” for short) integrates scalable heterogeneous processors, flexible networking, benchmarking tools, etc. to enable (e.g., system-level) designers to perform hardware and software co-design. With HCA system engineers can rapidly architect, benchmark, and/or evolve vehicle system architectures for autonomous driving. Other embodiments are also disclosed and claimed.

公开(公告)号：US20220108045A1

公开(公告)日：2022-04-07

申请号：US17494703

申请日：2021-10-05

Applicant: Intel Corporation

Inventor： Ignacio Alvarez ,  Patrick Mead ,  Carlos Ornelas ,  Daniel Lake ,  Miryam Lomeli Barajas ,  Victor Palacios Rivera ,  Yassir Mosleh ,  David Arditti Ilitzky ,  John Tell ,  Paul H. Dormitzer

IPC: G06F30/15 ,  G06F30/3323 ,  G06F15/173 ,  G05D1/00 ,  G06F117/08

Abstract: Methods and apparatus relating to heterogeneous compute architecture hardware/software co-design for autonomous driving are described. In one embodiment, a heterogeneous compute architecture for autonomous driving systems (also interchangeably referred to herein as Heterogeneous Compute Architecture or “HCA” for short) integrates scalable heterogeneous processors, flexible networking, benchmarking tools, etc. to enable (e.g., system-level) designers to perform hardware and software co-design. With HCA system engineers can rapidly architect, benchmark, and/or evolve vehicle system architectures for autonomous driving. Other embodiments are also disclosed and claimed.

公开(公告)号：US11138348B2

公开(公告)日：2021-10-05

申请号：US16155039

申请日：2018-10-09

Applicant: Intel Corporation

Inventor： Ignacio Alvarez ,  Patrick Mead ,  Carlos Ornelas ,  Daniel Lake ,  Miryam Lomeli Barajas ,  Victor Palacios Rivera ,  Yassir Mosleh ,  David Arditti Ilitzky ,  John Tell ,  Paul H. Dormitzer

IPC: G06F30/15 ,  G06F30/3323 ,  G06F15/173 ,  G05D1/00 ,  G06F117/08

Abstract: Methods and apparatus relating to heterogeneous compute architecture hardware/software co-design for autonomous driving are described. In one embodiment, a heterogeneous compute architecture for autonomous driving systems (also interchangeably referred to herein as Heterogeneous Compute Architecture or “HCA” for short) integrates scalable heterogeneous processors, flexible networking, benchmarking tools, etc. to enable (e.g., system-level) designers to perform hardware and software co-design. With HCA system engineers can rapidly architect, benchmark, and/or evolve vehicle system architectures for autonomous driving. Other embodiments are also disclosed and claimed.