公开(公告)号：US20170286106A1

公开(公告)日：2017-10-05

申请号：US15089291

申请日：2016-04-01

Applicant: Intel Corporation

Inventor： Daniel David Ben-Dayan Rubin ,  Yonatan Glesner

IPC: G06F9/30 ,  G06F9/38 ,  G06N7/00

CPC classification number: G06F9/3001 ,  G06F9/3855 ,  G06F17/17 ,  G06N7/005

Abstract: A processor includes a linear approximator and a front end including circuitry to assign linear approximation of a nonlinear function to a linear approximator. The linear approximator includes circuitry to divide a range of values for the linear approximation into a defined number of segments, perform linear approximation for each segment, move borders between the segments to reduce discontinuity moving along segments of variable length, repeat linear approximation for each segment until convergence, and return values for the linear approximation.

公开(公告)号：US20220027704A1

公开(公告)日：2022-01-27

申请号：US17366919

申请日：2021-07-02

Applicant: Intel Corporation

Inventor： Yonatan Glesner ,  Gal Novik ,  Dmitri Vainbrand ,  Gal Leibovich

IPC: G06N3/04 ,  G06N20/10

Abstract: Methods and apparatus relating to techniques for incremental network quantization. In an example, an apparatus comprises logic, at least partially comprising hardware logic to determine a plurality of weights for a layer of a convolutional neural network (CNN) comprising a plurality of kernels; organize the plurality of weights into a plurality of clusters for the plurality of kernels; and apply a K-means compression algorithm to each of the plurality of clusters. Other embodiments are also disclosed and claimed.

公开(公告)号：US09990196B2

公开(公告)日：2018-06-05

申请号：US15089291

申请日：2016-04-01

Applicant: Intel Corporation

Inventor： Daniel David Ben-Dayan Rubin ,  Yonatan Glesner

IPC: G06J1/00 ,  G06F9/30 ,  G06N7/00 ,  G06F9/38

CPC classification number: G06F9/3001 ,  G06F9/3855 ,  G06F17/17 ,  G06N7/005

Abstract: A processor includes a linear approximator and a front end including circuitry to assign linear approximation of a nonlinear function to a linear approximator. The linear approximator includes circuitry to divide a range of values for the linear approximation into a defined number of segments, perform linear approximation for each segment, move borders between the segments to reduce discontinuity moving along segments of variable length, repeat linear approximation for each segment until convergence, and return values for the linear approximation.

公开(公告)号：US11055604B2

公开(公告)日：2021-07-06

申请号：US15702193

申请日：2017-09-12

Applicant: Intel Corporation

Inventor： Yonatan Glesner ,  Gal Novik ,  Dmitri Vainbrand ,  Gal Leibovich

IPC: G06N3/04 ,  G06F3/06

Abstract: Methods and apparatus relating to techniques for incremental network quantization. In an example, an apparatus comprises logic, at least partially comprising hardware logic to determine a plurality of weights for a layer of a convolutional neural network (CNN) comprising a plurality of kernels; organize the plurality of weights into a plurality of clusters for the plurality of kernels; and apply a K-means compression algorithm to each of the plurality of clusters. Other embodiments are also disclosed and claimed.

公开(公告)号：US20190102673A1

公开(公告)日：2019-04-04

申请号：US15720298

申请日：2017-09-29

Applicant: Intel Corporation

Inventor： Gal Leibovich ,  Gal Novik ,  Yonatan Glesner

IPC: G06N3/08 ,  G06N3/04 ,  G06F17/30

Abstract: Methods and apparatus relating to online activation compression with K-means are described. In one embodiment, logic (e.g., in a processor) compresses one or more activation functions for a convolutional network based on non-uniform quantization. The non-uniform quantization for each layer of the convolutional network is performed offline, and an activation function for a specific layer of the convolutional network is quantized during runtime. Other embodiments are also disclosed and claimed.