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公开(公告)号：US20220158865A1
公开(公告)日：2022-05-19
申请号：US17665439
申请日：2022-02-04
Applicant: Intel Corporation
Inventor： Richard Marian THOMAIYAR , Janusz JURSKI , Myron LOEWEN , Zbigniew LUKWINSKI
IPC: H04L12/403 , H04L12/40 , H04L12/12
Abstract: Examples described herein relate to circuitry that is to manage communications to and from a manageability controller. In some examples, during communications on a first port, circuitry generates a bus busy condition for one or more other ports to block transactions from one or more devices.
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