公开(公告)号：US20220158865A1

公开(公告)日：2022-05-19

申请号：US17665439

申请日：2022-02-04

Applicant: Intel Corporation

Inventor： Richard Marian THOMAIYAR ,  Janusz JURSKI ,  Myron LOEWEN ,  Zbigniew LUKWINSKI

IPC: H04L12/403 ,  H04L12/40 ,  H04L12/12

Abstract: Examples described herein relate to circuitry that is to manage communications to and from a manageability controller. In some examples, during communications on a first port, circuitry generates a bus busy condition for one or more other ports to block transactions from one or more devices.

公开(公告)号：US20240303343A1

公开(公告)日：2024-09-12

申请号：US18666693

申请日：2024-05-16

Applicant: Intel Corporation

Inventor： Yi ZENG ,  Russell J. WUNDERLICH ,  Janusz JURSKI ,  Lumin ZHANG ,  Kasper WSZOLEK ,  Jeanne GUILLORY ,  Ching Yu LO ,  Teresa C. HERRICK ,  Richard Marian THOMAIYAR

IPC: G06F21/57 ,  G06F1/06

CPC classification number: G06F21/575 ,  G06F1/06 ,  G06F21/572

Abstract: Examples described herein relate to multiple processor sockets comprising processors connected thereto and first circuitry. The first circuitry is to: based on a first mode of operation: configure the multiple processor sockets to operate with a single memory address space and share interfaces and based on a second mode of operation: configure the interfaces accessible to the multiple processor sockets to provide isolated communications to processor sockets in different partitions and configure the multiple processor sockets to operate in independent memory address spaces.

公开(公告)号：US20250103380A1

公开(公告)日：2025-03-27

申请号：US18973872

申请日：2024-12-09

Applicant: Intel Corporation

Inventor： Kasper WSZOLEK ,  Janusz JURSKI ,  Mariusz ORIOL ,  Matthew James ADILETTA

IPC: G06F9/455 ,  G06F13/38 ,  G06F13/42

Abstract: Examples described herein relate to at least one processor that is to communicate with a management controller to communicate with multiple interfaces. In some examples, wherein at least two of the multiple interfaces are to provide boot firmware code to the at least one processor and a connection interface.

公开(公告)号：US20220197859A1

公开(公告)日：2022-06-23

申请号：US17690950

申请日：2022-03-09

Applicant: Intel Corporation

Inventor： Janusz JURSKI ,  Myron LOEWEN ,  Mariusz ORIOL ,  Patrick SCHOELLER ,  Jerry BACKER ,  Richard Marian THOMAIYAR ,  Eliel LOUZOUN ,  Piotr MATUSZCZAK

IPC: G06F15/82 ,  G06F21/62

Abstract: Methods and apparatus for scalable MCTP infrastructure. A system is split into independent MCTP domains, wherein each MCTP domain uses Endpoint Identifiers (EIDs) for endpoint devices within the MCTP domain in a manner similar to conventional MCTP operations. A new class of MCTP devices (referred to as a Domain Controllers) is provided to enable inter-domain communication and communication with global devices. Global traffic originators or receivers like a BMC (Baseboard Management Controller), Infrastructure Processing Unit (IPU), Smart NIC (Network Interface Card), Debugger, or PROT (Platform Root or Trust) discover and establish two-way communication through the Domain Controllers to any of the devices in the target domain(s). The Domain Controllers are configured to implement tunneled connections between global devices and domain endpoint devices. The tunneled connections may employ encapsulated messages with outer and inner headers and/or augmented MCTP messages with repurposed fields used to store source and destination EIDs.