公开(公告)号：US11171856B2

公开(公告)日：2021-11-09

申请号：US15835393

申请日：2017-12-07

申请人： Intel IP Corporation

发明人： Pradeep Kumar ,  Amit Badole ,  Arumugam Vijayaraman ,  Helmut Reinig ,  Patrik Eder ,  Vladimir Todorov ,  Abhiram Anantharamu

IPC分类号： H04L12/26 ,  H04J3/06 ,  G06F1/04 ,  H04L12/841 ,  G06F1/14

摘要： An apparatus is provided which comprises: a first network interface (NI) to receive data from a source; a second NI coupled to a target; and a circuitry to generate a sequence of source timestamps and a sequence of target timestamps, wherein the first NI is to receive the sequence of source timestamps, and associate a first source timestamp of the sequence of source timestamps with the data, and wherein the second NI is to receive: the data with the first source timestamp from the first NI and the sequence of target timestamps from the circuitry, the second NI to generate a timestamp for the data, based at least in part on the first source timestamp and a first target timestamp of the sequence of target timestamps.

公开(公告)号：US20190036803A1

公开(公告)日：2019-01-31

申请号：US15835393

申请日：2017-12-07

申请人： Intel IP Corporation

发明人： Pradeep Kumar ,  Amit Badole ,  Arumugam Vijayaraman ,  Helmut Reinig ,  Patrik Eder ,  Vladimir Todorov ,  Abhiram Anantharamu

IPC分类号： H04L12/26 ,  H04J3/06 ,  G06F1/04

摘要： An apparatus is provided which comprises: a first network interface (NI) to receive data from a source; a second NI coupled to a target; and a circuitry to generate a sequence of source timestamps and a sequence of target timestamps, wherein the first NI is to receive the sequence of source timestamps, and associate a first source timestamp of the sequence of source timestamps with the data, and wherein the second NI is to receive: the data with the first source timestamp from the first NI and the sequence of target timestamps from the circuitry, the second NI to generate a timestamp for the data, based at least in part on the first source timestamp and a first target timestamp of the sequence of target timestamps.