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公开(公告)号:US20040061523A1
公开(公告)日:2004-04-01
申请号:US10255471
申请日:2002-09-26
发明人: Juan-Antonio Carballo , Jeffrey L. Burns , Gary Dale Carpenter , Kevin John Nowka , Ivan Vo , Seung-moon Yoo
IPC分类号: H03K019/0175
CPC分类号: H03K19/0008
摘要: A method of reducing power consumption while maintaining performance characteristics and avoiding costly over-design of a high-speed communication link embedded in an SOC is provided. The method includes synthesizing the communication link at a reduced voltage to determine and isolate circuitry that is supply-voltage-critical from circuitry that is non-supply-voltage-critical. The supply-voltage-critical circuitry contains components that may not operate at the reduced voltage without degrading the performance characteristics of the communication link. A non-reduced voltage is used to drive the supply-voltage-critical circuitry while the reduced voltage is used to drive the non-supply-voltage-critical circuitry. The reduced voltage is generated using a voltage regulator embedded in the communication link.