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公开(公告)号:US11474821B1
公开(公告)日:2022-10-18
申请号:US17318252
申请日:2021-05-12
发明人: Amir Turi , Avraham Ayzenfeld , Gilad Shimon Merran , Yanai Danan , Amit Shay , Yossi Shapira , Yair Fried , Oren Ben Gigi , Omri Rafaeli
IPC分类号: G06F9/38
摘要: In an approach to processor dependency-aware instruction execution, responsive to a new instruction being issued to an instruction issue queue in a processor, a future dependency count is incremented for each instruction of a plurality of instructions in the instruction issue queue that has a dependency on the new instruction. The plurality of instructions in the instruction issue queue are prioritized based on the future dependency count. The highest priority instruction of the plurality of instructions in the instruction issue queue is issued.