公开(公告)号：US20040236891A1

公开(公告)日：2004-11-25

申请号：US10425420

申请日：2003-04-28

申请人： International Business Machines Corporation

发明人： Ravi Kumar Arimilli ,  Vicente Enrique Chung ,  Jody Bern Joyner ,  Jerry Don Lewis

IPC分类号： G06F013/36

CPC分类号： G06F15/17337

摘要： A method and system for providing a multiprocessor processor book that is utilized as a building block for a large scale data processing system. Two 4-way multi-chip modules (MCM) are utilized to create the processor book. The first and second MCMs are configured with normal wiring among their respective processors. An additional wiring is provided that links external buses of each chip of the first MCM with buses of a corresponding chip of the second MCM and vice versa. The additional wiring enables each processor of the first MCM substantially direct access to the distributed memory components of the next MCM with no affinity. The processor book is plugged into a processor rack configured to receive multiple processor books that together make up the large scale data processing system.

摘要翻译： 一种用于提供用作大规模数据处理系统的构建块的多处理器处理器书的方法和系统。 利用两个4路多芯片模块（MCM）来创建处理器书。 第一和第二MCM在它们各自的处理器之间配置有正常的接线。 提供了另外的布线，其将第一MCM的每个芯片的外部总线与第二MCM的相应芯片的总线相链接，反之亦然。 附加布线使得第一MCM的每个处理器基本上直接访问下一个MCM的分布式存储器组件，没有亲和力。 处理器手册插入处理器机架，配置为接收多个处理器书籍，这些书籍一起构成大规模数据处理系统。