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    METHODS, APPARATUS, AND ARTICLES OF MANUFACTURE TO MANAGE MEMORY
    1.
    发明申请
    METHODS, APPARATUS, AND ARTICLES OF MANUFACTURE TO MANAGE MEMORY 审中-公开
    方法，设备和制造管理存储器的文章

    公开(公告)号：US20130091331A1

    公开(公告)日：2013-04-11

    申请号：US13270785

    申请日：2011-10-11

    Applicant: Iulian Moraru ,  Niraj Tolia ,  Nathan Lorenzo Binkert

    Inventor： Iulian Moraru ,  Niraj Tolia ,  Nathan Lorenzo Binkert

    IPC: G06F12/08

    CPC classification number: G06F12/126

    Abstract: Methods, apparatus, and articles of manufacture to manage memory are disclosed. An example method includes mapping a cache memory to a random access memory, incrementing a counter in response to a data write to a cache line of the cache memory, decrementing the counter in response to a write-back of the data from the cache line, and committing the data to the RAM when the counter is equal to a threshold.

    Abstract translation: 公开了用于管理存储器的方法，装置和制品。 示例性方法包括将高速缓冲存储器映射到随机存取存储器，响应于对高速缓冲存储器的高速缓存行的数据写入而递增计数器，响应于来自高速缓存行的数据的写回来递减计数器， 并且当计数器等于阈值时将数据提交给RAM。

    METHODS AND APPARATUS TO ACCESS DATA IN NON-VOLATILE MEMORY
    2.
    发明申请
    METHODS AND APPARATUS TO ACCESS DATA IN NON-VOLATILE MEMORY 有权
    在非易失性存储器中访问数据的方法和设备

    公开(公告)号：US20130054869A1

    公开(公告)日：2013-02-28

    申请号：US13222919

    申请日：2011-08-31

    Applicant: Niraj Tolia ,  Nathan Lorenzo Binkert ,  Jichuan Chang

    Inventor： Niraj Tolia ,  Nathan Lorenzo Binkert ,  Jichuan Chang

    IPC: G06F12/02 ,  G06F12/08

    CPC classification number: G06F12/0871 ,  G06F11/14 ,  G06F17/30 ,  G06F17/30321 ,  G06F2212/264

    Abstract: Example methods, apparatus, and articles of manufacture to access data are disclosed. A disclosed example method involves generating a key-value association table in a non-volatile memory to store physical addresses of a data cache storing data previously retrieved from a data structure. The example method also involves storing recovery metadata in the non-volatile memory. The recovery metadata includes a first address of the key-value association table in the non-volatile memory. In addition, following a re-boot process, the locations of the key-value association table and the data cache are retrieved using the recovery metadata without needing to access the data structure to re-generate the key-value association table and the data cache.

    Abstract translation: 公开了用于访问数据的示例性方法，装置和制品。 所公开的示例性方法涉及在非易失性存储器中生成密钥值关联表，以存储先前从数据结构检索的数据的数据高速缓存的物理地址。 该示例方法还涉及将恢复元数据存储在非易失性存储器中。 恢复元数据包括非易失性存储器中的键值关联表的第一地址。 另外，在重新启动过程之后，使用恢复元数据检索密钥值关联表和数据高速缓存的位置，而不需要访问数据结构以重新生成密钥值关联表和数据缓存 。

    Methods and apparatus to access data in non-volatile memory
    3.
    发明授权
    Methods and apparatus to access data in non-volatile memory 有权
    在非易失性存储器中访问数据的方法和装置

    公开(公告)号：US08499121B2

    公开(公告)日：2013-07-30

    申请号：US13222919

    申请日：2011-08-31

    Applicant: Niraj Tolia ,  Nathan Lorenzo Binkert ,  Jichuan Chang

    Inventor： Niraj Tolia ,  Nathan Lorenzo Binkert ,  Jichuan Chang

    IPC: G06F12/00

    CPC classification number: G06F12/0871 ,  G06F11/14 ,  G06F17/30 ,  G06F17/30321 ,  G06F2212/264

    Abstract: Example methods, apparatus, and articles of manufacture to access data are disclosed. A disclosed example method involves generating a key-value association table in a non-volatile memory to store physical addresses of a data cache storing data previously retrieved from a data structure. The example method also involves storing recovery metadata in the non-volatile memory. The recovery metadata includes a first address of the key-value association table in the non-volatile memory. In addition, following a re-boot process, the locations of the key-value association table and the data cache are retrieved using the recovery metadata without needing to access the data structure to re-generate the key-value association table and the data cache.

    Abstract translation: 公开了用于访问数据的示例性方法，装置和制品。 所公开的示例性方法涉及在非易失性存储器中生成密钥值关联表，以存储先前从数据结构检索的数据的数据高速缓存的物理地址。 该示例方法还涉及将恢复元数据存储在非易失性存储器中。 恢复元数据包括非易失性存储器中的键值关联表的第一地址。 另外，在重新启动过程之后，使用恢复元数据检索密钥值关联表和数据高速缓存的位置，而不需要访问数据结构以重新生成密钥值关联表和数据缓存 。

    COMPOSITE PROCESSORS
    5.
    发明申请
    COMPOSITE PROCESSORS 有权
    复合处理器

    公开(公告)号：US20130318325A1

    公开(公告)日：2013-11-28

    申请号：US13978039

    申请日：2011-01-20

    Applicant: Raymond G. Beausoleil ,  Marco Fiorentino ,  Moray McLaren ,  Greg Astfalk ,  Nathan Lorenzo Binkert ,  David A. Fattal

    Inventor： Raymond G. Beausoleil ,  Marco Fiorentino ,  Moray McLaren ,  Greg Astfalk ,  Nathan Lorenzo Binkert ,  David A. Fattal

    IPC: G06F15/80

    CPC classification number: G06F15/80 ,  G06E3/00 ,  G06F3/00 ,  G06F13/4063

    Abstract: In one example, a composite processor (100) includes a circuit board (1200), a first processor element package (1230), and a second processor element package (1240). The circuit board has an optical link (1211) and an electrical link (1221). The first processor element package (1230) includes a substrate (1231) with an integrated circuit (240), a sub-wavelength grating optical coupler (1232), and an electrical coupler (1233) coupled to the electrical link (1221) of the circuit board (1200). The second processor element package (1240) includes a substrate (1241) with an integrated circuit (240), a sub-wavelength grating optical coupler (1242), and an electrical coupler (1243) coupled to the electrical link (1221) of the circuit board (1220). The sub-wavelength grating optical coupler (1232) of the first processor element package (1230), the optical link (1211) of the circuit board (1220), and the sub-wavelength grating optical coupler (1242) of the second processor element package (1240) collectively define an optical communications path (1270) between the substrate (1231) of the first processor element package (1230) and the substrate (1241) of the second processor element package (1240).

    Abstract translation: 在一个示例中，复合处理器（100）包括电路板（1200），第一处理器元件封装（1230）和第二处理器元件封装（1240）。 电路板具有光学链路（1211）和电连接（1221）。 第一处理器元件封装（1230）包括具有集成电路（240）的基板（1231），子波长光栅光耦合器（1232）和耦合到所述电连接器（1221）的电耦合器（1233） 电路板（1200）。 第二处理器元件封装（1240）包括具有集成电路（240）的基板（1241），子波长光栅光耦合器（1242）和耦合到所述电连接器（1221）的电耦合器（1243） 电路板（1220）。 第一处理器元件封装（1230）的子波长光栅光耦合器（1232），电路板（1220）的光链路（1211）以及第二处理器元件的子波长光栅光耦合器（1242） 封装（1240）共同地限定了第一处理器元件封装（1230）的衬底（1231）与第二处理器元件封装（1240）的衬底（1241）之间的光通信路径（1270）。

    TUNABLE RESONATORS
    6.
    发明申请
    TUNABLE RESONATORS 审中-公开
    可调谐谐振器

    公开(公告)号：US20120189026A1

    公开(公告)日：2012-07-26

    申请号：US13259468

    申请日：2009-10-08

    Applicant: Nathan Lorenzo Binkert ,  Jung Ho Ahn ,  Marco Florentino

    Inventor： Nathan Lorenzo Binkert ,  Jung Ho Ahn ,  Marco Florentino

    IPC: H01S3/11

    CPC classification number: G02B6/29341 ,  G02F1/2257 ,  G02F2203/15

    Abstract: Various embodiments of the present invention relate to electronically tunable ring resonators. In one embodiment of the present invention, a resonator structure (300,1200) includes an inner resonator disposed on a surface of a substrate, and a phase-change layer (304,1204) covering the resonator. The resonance wavelength of the resonator structure can be selected by applying of a first voltage that changes the effective refractive index of the inner resonator and by applying of a second voltage that changes the effective refractive index of the phase-change layer.

    Abstract translation: 本发明的各种实施例涉及电子可调谐环形谐振器。 在本发明的一个实施例中，谐振器结构（300,1200）包括设置在衬底的表面上的内谐振器和覆盖谐振器的相变层（304,1204）。 谐振器结构的谐振波长可以通过施加改变内部谐振器的有效折射率的第一电压和施加改变相变层的有效折射率的第二电压来选择。

    FLOW-CONTROL METHODS AND SYSTEMS FOR MULTIBUS SYSTEMS
    7.
    发明申请
    FLOW-CONTROL METHODS AND SYSTEMS FOR MULTIBUS SYSTEMS 有权
    多通道系统的流量控制方法和系统

    公开(公告)号：US20110286743A1

    公开(公告)日：2011-11-24

    申请号：US12785962

    申请日：2010-05-24

    Applicant: Moray McLaren ,  Nathan Lorenzo Binkert ,  Alan Lynn Davis ,  Norman Paul Jouppi

    Inventor： Moray McLaren ,  Nathan Lorenzo Binkert ,  Alan Lynn Davis ,  Norman Paul Jouppi

    IPC: H04J14/00 ,  H04L12/26

    CPC classification number: H04B10/278 ,  H04J14/028 ,  H04L47/13

    Abstract: Methods and systems are provided that prevent buffer overflow in multibus systems. In one aspect, a method for controlling the flow of data in a multibus system includes, for each node having an associated broadcast bus in the multibus system, generating status information regarding available data storage space of each receive buffer of the node. The method includes broadcasting the status information to the other nodes connected to the broadcast bus and collecting status information regarding the available storage space of receive buffers of the other nodes connected to the broadcast bus. The method also includes determining whether or not to send data from the node to at least one of the other nodes over the broadcast bus based on the collected status information.

    Abstract translation: 提供了防止多总线系统中的缓冲区溢出的方法和系统。 在一个方面，一种用于控制多巴系统中的数据流的方法包括：对于在所述多总线系统中具有相关联的广播总线的每个节点，生成关于所述节点的每个接收缓冲器的可用数据存储空间的状态信息。 该方法包括将状态信息广播到连接到广播总线的其他节点，并且收集与连接到广播总线的其他节点的接收缓冲器的可用存储空间有关的状态信息。 该方法还包括基于收集的状态信息来确定是否通过广播总线从节点向至少一个其他节点发送数据。

    NON-VOLATILE DATA STRUCTURE MANAGER AND METHODS OF MANAGING NON-VOLATILE DATA STRUCTURES
    8.
    发明申请
    NON-VOLATILE DATA STRUCTURE MANAGER AND METHODS OF MANAGING NON-VOLATILE DATA STRUCTURES 审中-公开
    非挥发性数据结构管理器和管理非易失性数据结构的方法

    公开(公告)号：US20130111105A1

    公开(公告)日：2013-05-02

    申请号：US13285675

    申请日：2011-10-31

    Applicant: Antonio Lain ,  Nathan Lorenzo Binkert

    Inventor： Antonio Lain ,  Nathan Lorenzo Binkert

    IPC: G06F12/02

    CPC classification number: G06F11/1471 ,  G06F12/0246 ,  G06F2212/7201

    Abstract: Non-volatile data structure managers and methods to manage non-volatile data structures are disclosed. An example non-volatile data structure manager includes a persistent data structure (PDS) to maintain at least one version of a non-volatile heap; a PDS versioner to create a version of the PDS reflective of a state of the non-volatile heap; and a memory updater to perform a direct memory update of the non-volatile heap in response to a write call routed from an application that shares a region of memory corresponding to the non-volatile heap as read-only, wherein the creation of the version of the PDS is caused by the direct memory update.

    Abstract translation: 公开了非易失性数据结构管理器和管理非易失性数据结构的方法。 示例性非易失性数据结构管理器包括维持非易失性堆的至少一个版本的持久数据结构（PDS）; PDS版本管理器创建一个版本的PDS反映非易失性堆的状态; 以及存储器更新器，用于响应于从共享与非易失性堆对应的存储器区域的应用程序路由的写入呼叫，以只读方式执行非易失性堆栈的直接存储器更新，其中创建版本 的PDS是由直接内存更新引起的。

    ENERGY-EFFICIENT AND FAULT-TOLERANT RESONATOR-BASED MODULATION AND WAVELENGTH DIVISION MULTIPLEXING SYSTEMS
    10.
    发明申请
    ENERGY-EFFICIENT AND FAULT-TOLERANT RESONATOR-BASED MODULATION AND WAVELENGTH DIVISION MULTIPLEXING SYSTEMS 有权
    基于能量和故障的基于谐振器的调制和波长分割多路复用系统

    公开(公告)号：US20110280579A1

    公开(公告)日：2011-11-17

    申请号：US12777500

    申请日：2010-05-11

    Applicant: Moray McLaren ,  Nathan Lorenzo Binkert ,  Alan Lynn Davis ,  Marco Florentino

    Inventor： Moray McLaren ,  Nathan Lorenzo Binkert ,  Alan Lynn Davis ,  Marco Florentino

    IPC: H04J14/02

    CPC classification number: G02B6/12007 ,  G02B6/29343

    Abstract: Systems and methods are provided for modulating, channels in dense wavelength division multiplexing (“DWDM”) systems. In one aspect, a modulation and wavelength division multiplexing system includes a channel source and a waveguide tree structure disposed on a substrate. The tree structure includes waveguides branching from a root waveguide. The waveguides include two or more terminus waveguides coupled to the channel source. The system also includes one or more modulator arrays disposed on the substrate. Each modulator array is optically coupled to one of the two or more terminus waveguides and is configured to modulate channels injected into a terminus waveguide from the channel source to produce corresponding optical signals that propagate from the terminus waveguide along one or more of the waveguides to the root waveguide.

    Abstract translation: 提供了用于调制密集波分复用（“DWDM”）系统中的信道的系统和方法。 在一个方面，调制和波分复用系统包括设置在基板上的信道源和波导树结构。 树结构包括从根波导分支的波导。 波导包括耦合到沟道源的两个或更多个端子波导。 该系统还包括设置在基板上的一个或多个调制器阵列。 每个调制器阵列光学耦合到两个或更多个终端波导中的一个，并且被配置为调制从信道源注入到终端波导中的信道，以产生相应的光信号，其从一个或多个波导从终端波导传播到 根波导。

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