公开(公告)号：US20190066356A1

公开(公告)日：2019-02-28

申请号：US15693084

申请日：2017-08-31

申请人： JOHN C. GIERACH ,  DARREL K. PALKE ,  TRAVIS T. SCHLUESSLER ,  PRASOONKUMAR SURTI

发明人： JOHN C. GIERACH ,  DARREL K. PALKE ,  TRAVIS T. SCHLUESSLER ,  PRASOONKUMAR SURTI

IPC分类号： G06T15/00 ,  G06T15/80 ,  G06T15/40 ,  G06T15/20

CPC分类号： G06T15/005 ,  G06T1/20 ,  G06T1/60 ,  G06T15/205 ,  G06T15/40 ,  G06T15/80 ,  G06T2200/28

摘要： An apparatus and method for programmable depth stencil pipeline stage and shading. For example, one embodiment of a graphics processing apparatus comprises: a rasterizer to generate a plurality of pixel blocks, one or more of which overlap one or more primitives; programmable depth stencil circuitry to perform depth stencil tests on the pixels which overlap the one or more primitives to identify pixels which pass the depth stencil tests; and thread dispatch circuitry to dispatch pixel shader threads to perform pixel shading operations on those pixels which pass the depth stencil tests, the thread dispatch circuitry including thread dispatch recombine logic to combine pixels which have passed the depth stencil test from multiple pixel blocks into a set of pixel shader threads to be executed concurrently on single instruction multiple data (SIMD) hardware.