Variable architecture computer with vector parallel processor and using
instructions with variable length fields
    1.
    发明授权
    Variable architecture computer with vector parallel processor and using instructions with variable length fields 失效
    具有矢量并行处理器和可变长度字段的指令的可变架构计算机

    公开(公告)号:US5706460A

    公开(公告)日:1998-01-06

    申请号:US672213

    申请日:1991-03-19

    摘要: A variable vectored architecture digital computer provides real-time cont computations for a rocket control system by executing efficient variable-length instructions optimized for such an application by means of a microprogrammed processor and variable length fields within each instruction concept. A parallel architecture with two streams of commands is used with a new command structure. A new, more powerful instruction set was implemented to increase the throughput. Included in these new instructions are a series of block type moves which allow large amounts of data to be moved by loops within the microprogram instead of loops of firmware instructions which are fetched over and over again for each memory address. The new mechanization allows the firmware instruction fields to vary in length from 1 to 16 bits instead of the fixed 4 bit or 12 bit bytes found in the prior art.

    摘要翻译: 可变向量结构数字计算机通过对每个指令概念中的微程序处理器和可变长度字段执行针对这样的应用优化的有效的可变长度指令,为火箭控制系统提供实时控制计算。 具有两个命令流的并行架构与新的命令结构一起使用。 实现了一种新的更强大的指令集来提高吞吐量。 这些新指令中包括一系列块类型的移动,允许大量数据通过微程序中的循环移动,而不是针对每个存储器地址一次又一次地获取的固件指令的循环。 新的机械化允许固件指令字段的长度从1到16位而不是现有技术中找到的固定的4位或12位字节。