Complementary spin transistor logic circuit
    2.
    发明授权
    Complementary spin transistor logic circuit 有权
    互补自旋晶体管逻辑电路

    公开(公告)号:US08125247B2

    公开(公告)日:2012-02-28

    申请号:US12899778

    申请日:2010-10-07

    IPC分类号: H03K19/091 H01L21/02

    摘要: There is provided a complementary spin transistor logic circuit, including: a parallel spin transistor that includes a magnetized first source, a first drain magnetized in parallel with the magnetization direction of the first source, a first channel layer and a first gate electrode; and an anti-parallel spin transistor that includes a magnetized second source, a second drain magnetized in anti-parallel with the magnetization direction of the second source, a second channel layer and a second gate electrode, wherein the first gate electrode and the second gate electrode are connected to a common input terminal.

    摘要翻译: 提供了一种互补自旋晶体管逻辑电路,包括:并联自旋晶体管,其包括磁化的第一源,与第一源的磁化方向平行磁化的第一漏极,第一沟道层和第一栅电极; 以及反并联自旋晶体管,其包括磁化的第二源极,与所述第二源极的磁化方向反并联的第二漏极,第二沟道层和第二栅电极,其中所述第一栅电极和所述第二栅极 电极连接到公共输入端子。

    COMPLEMENTARY SPIN TRANSISTOR LOGIC CIRCUIT
    3.
    发明申请
    COMPLEMENTARY SPIN TRANSISTOR LOGIC CIRCUIT 有权
    补充旋转晶体管逻辑电路

    公开(公告)号:US20110279146A1

    公开(公告)日:2011-11-17

    申请号:US12899778

    申请日:2010-10-07

    IPC分类号: H03K19/091

    摘要: There is provided a complementary spin transistor logic circuit, including: a parallel spin transistor that includes a magnetized first source, a first drain magnetized in parallel with the magnetization direction of the first source, a first channel layer and a first gate electrode; and an anti-parallel spin transistor that includes a magnetized second source, a second drain magnetized in anti-parallel with the magnetization direction of the second source, a second channel layer and a second gate electrode, wherein the first gate electrode and the second gate electrode are connected to a common input terminal.

    摘要翻译: 提供了一种互补自旋晶体管逻辑电路,包括:并联自旋晶体管,其包括磁化的第一源,与第一源的磁化方向平行磁化的第一漏极,第一沟道层和第一栅电极; 以及反并联自旋晶体管,其包括磁化的第二源极,与所述第二源极的磁化方向反并联的第二漏极,第二沟道层和第二栅电极,其中所述第一栅电极和所述第二栅极 电极连接到公共输入端子。