公开(公告)号：US20100029072A1

公开(公告)日：2010-02-04

申请号：US12507887

申请日：2009-07-23

申请人： Jae-Eon Park ,  Jun-Keun Kwak ,  Jin-Woo Choi ,  Sunfei Fang ,  Jiang Yan

发明人： Jae-Eon Park ,  Jun-Keun Kwak ,  Jin-Woo Choi ,  Sunfei Fang ,  Jiang Yan

IPC分类号： H01L21/768 ,  H01L21/8234

CPC分类号： H01L21/823475 ,  H01L21/76828 ,  H01L21/76831 ,  H01L21/823425

摘要： Methods of forming integrated circuit devices include forming an electrically insulating layer having a contact hole therein, on a substrate, and then depositing an electrically insulating liner onto a sidewall of the contact hole using an atomic layer deposition (ALD) technique. This electrically insulating liner, which may include gelatinous silica or silicon dioxide, for example, may be deposited to a thickness in a range from 40 Å to 100 Å. A portion of the electrically insulating liner is then removed from a bottom of the contact hole and a barrier metal layer is then formed on the electrically insulating liner and on a bottom of the contact hole. The step of forming the barrier metal layer may be followed by filling the contact hole with a metal interconnect.

摘要翻译： 形成集成电路器件的方法包括在衬底上形成其中具有接触孔的电绝缘层，然后使用原子层沉积（ALD）技术将电绝缘衬垫沉积到接触孔的侧壁上。 例如，可以包括凝胶状二氧化硅或二氧化硅的这种电绝缘衬垫可以沉积到从而在一个范围内的厚度。 然后从接触孔的底部去除电绝缘衬垫的一部分，然后在电绝缘衬垫上和接触孔的底部上形成阻挡金属层。 形成阻挡金属层的步骤之后可以用金属互连填充接触孔。

公开(公告)号：US20080311711A1

公开(公告)日：2008-12-18

申请号：US11818197

申请日：2007-06-13

申请人： Roland Hampp ,  Jun-Keun Kwak ,  Keith Kwong Hon Wong

发明人： Roland Hampp ,  Jun-Keun Kwak ,  Keith Kwong Hon Wong

IPC分类号： H01L21/4763 ,  H01L21/336

CPC分类号： H01L21/76846 ,  H01L21/2855 ,  H01L21/76814 ,  H01L21/76865 ,  H01L23/485 ,  H01L29/665 ,  H01L29/7833

摘要： A method of making a semiconductor interconnect is disclosed. A semiconductor body on which a transistor comprising a doped region is formed is provided. A dielectric region is formed over the doped region, and a contact hole is formed in the dielectric to expose the doped region. The contact hole is cleaned and a first layer of metal is formed over a bottom and sidewalls of the contact hole. The first layer of metal is thinned so that the thickness of the first layer of metal on the sidewalls is made more uniform. A barrier is formed over the first layer of metal and the contact hole is filled with conductive material.

摘要翻译： 公开了制造半导体互连的方法。 提供了形成有包括掺杂区域的晶体管的半导体主体。 在掺杂区域上形成电介质区域，并且在电介质中形成接触孔以暴露掺杂区域。 接触孔被清洁，第一层金属形成在接触孔的底部和侧壁上。 使第一金属层变薄，使得侧壁上的第一金属层的厚度更均匀。 在第一金属层上形成屏障，并且接触孔填充有导电材料。

公开(公告)号：US20080138985A1

公开(公告)日：2008-06-12

申请号：US11567517

申请日：2006-12-06

申请人： Anita Madan ,  Robert J. Purtell ,  Keith Kwong Hon Wong ,  Jun-Keun Kwak

发明人： Anita Madan ,  Robert J. Purtell ,  Keith Kwong Hon Wong ,  Jun-Keun Kwak

IPC分类号： H01L21/44

CPC分类号： H01L21/28518

摘要： A method of forming silicide contacts for semiconductor devices includes subjecting a silicon containing semiconductor wafer to a degas treatment at an initial degas temperature of about 250 to about 400° C., transferring the semiconductor wafer from a degas chamber to a deposition chamber, depositing a nickel containing layer over the wafer following transfer of the wafer from the degas chamber to the deposition chamber, and annealing the semiconductor wafer so as to create silicide regions at portions on the wafer where nickel material is formed over silicon.

摘要翻译： 形成用于半导体器件的硅化物触点的方法包括在约250至约400℃的初始脱气温度下对含硅半导体晶片进行脱气处理，将半导体晶片从脱气室转移至沉积室， 将晶片从脱气室转移到沉积室之后，在晶片上方的镍含量层，以及对半导体晶片进行退火，以在晶片上形成硅材料的部分上形成硅化物区域，其中镍材料形成在硅上。

公开(公告)号：US07622386B2

公开(公告)日：2009-11-24

申请号：US11567517

申请日：2006-12-06

申请人： Anita Madan ,  Robert J. Purtell ,  Keith Kwong Hon Wong ,  Jun-Keun Kwak

发明人： Anita Madan ,  Robert J. Purtell ,  Keith Kwong Hon Wong ,  Jun-Keun Kwak

IPC分类号： H01L21/44

CPC分类号： H01L21/28518

摘要： A method of forming silicide contacts for semiconductor devices includes subjecting a silicon containing semiconductor wafer to a degas treatment at an initial degas temperature of about 250 to about 400° C., transferring the semiconductor wafer from a degas chamber to a deposition chamber, depositing a nickel containing layer over the wafer following transfer of the wafer from the degas chamber to the deposition chamber, and annealing the semiconductor wafer so as to create silicide regions at portions on the wafer where nickel material is formed over silicon.

摘要翻译： 形成用于半导体器件的硅化物触点的方法包括在约250至约400℃的初始脱气温度下对含硅半导体晶片进行脱气处理，将半导体晶片从脱气室转移至沉积室， 将晶片从脱气室转移到沉积室之后，在晶片上方的镍含量层，以及对半导体晶片进行退火，以在晶片上形成硅材料的部分上形成硅化物区域，其中镍材料形成在硅上。