公开(公告)号：US5146547A

公开(公告)日：1992-09-08

申请号：US790101

申请日：1991-11-07

申请人： James L. Beck ,  James R. Booth ,  Carl P. Cole ,  Lynn M. Oliver ,  Warren J. Spina ,  Stephen R. Troyer

发明人： James L. Beck ,  James R. Booth ,  Carl P. Cole ,  Lynn M. Oliver ,  Warren J. Spina ,  Stephen R. Troyer

IPC分类号： G06K15/00 ,  G06K15/12

CPC分类号： G06K15/00 ,  G06K15/128 ,  G06K2215/0065

摘要： A page printer (101) which rasterizes a page utilizing partial page bit map swaths. Received data to be printed is stored in packets (12-17) in a page buffer in random access memory (105). Data within each packet is arranged in printing order down the page to be printed, but the packets themselves are arranged in the order received, and are not indexed or linked. As each swath (11) is rasterized, each packet is examined, and packets containing data falling at least in part within the active swath are processed. The printer is controlled by a programmed microprocessor, and logic hardware assistance is provided for translating data addresses from logical addresses (54) to physical addresses (52). Logic hardware assistance is also provided for making the determination of whether or not a given data address lies within the active swath.

摘要翻译： 页面打印机（101），其利用部分页位图行栅格化页面。 要被打印的接收数据被存储在随机存取存储器（105）中的页面缓冲器中的分组（12-17）中。 每个数据包中的数据按打印顺序排列在要打印的页面上，但数据包本身按接收的顺序排列，不进行索引或链接。 当每个条带（11）被光栅化时，检查每个分组，并且处理包含至少部分地落入活动条带内的数据的分组。 打印机由编程微处理器控制，并且提供逻辑硬件辅助来将数据地址从逻辑地址（54）转换为物理地址（52）。 还提供了逻辑硬件辅助，用于确定给定的数据地址是否位于活动的条带内。

公开(公告)号：US5050100A

公开(公告)日：1991-09-17

申请号：US569323

申请日：1990-08-17

申请人： Brian W. Damon ,  Cuong M. Hoang ,  Jeffrey A. Minnick ,  Terry W. Ringle ,  Warren J. Spina ,  Stephen R. Troyer

发明人： Brian W. Damon ,  Cuong M. Hoang ,  Jeffrey A. Minnick ,  Terry W. Ringle ,  Warren J. Spina ,  Stephen R. Troyer

IPC分类号： G06K15/00

CPC分类号： G06K15/00 ,  G06K2215/0065 ,  G06K2215/0077 ,  G06K2215/008

摘要： A printer having a print engine (13) and a bit map memory (12) including a number of page image areas (31) into which information to be printed is rasterized and from which information for the print engine is serialized. A digital processor (11) controlling the print engine is operable to reduce a page image area (31) to a modified page image area (37) based upon the highest and lowest addresses at which information has been written into the page image area. The digital processor (11) is also operable to begin rasterization of a new page image area when a sufficient amount of an existing page image area (41) has been serialized to make available the requisite bit map memory for the new page.

公开(公告)号：US5247636A

公开(公告)日：1993-09-21

申请号：US531500

申请日：1990-05-31

申请人： Jeffrey A. Minnick ,  Warren J. Spina

发明人： Jeffrey A. Minnick ,  Warren J. Spina

IPC分类号： G06F1/06 ,  G06F1/04

CPC分类号： G06F1/04

摘要： A clock circuit (12) normally couples clock pulses to a microprocessor (11), which is capable of accessing memory devices (13,14) having different access times. Access of a "slow" memory device 14 is detected by the clock circuit, and in response thereto, one or more clock pulses are not coupled to the microprocessor. This suspends operation of the microprocessor for a suitable amount of time so that the microprocessor reads valid data from the slow memory device. The number of clock pulses blocked from reaching the microprocessor can be set in a delay circuit (28) in the clock circuit.