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    Method of manufacturing a silicon on insulator semiconductor
    1.
    发明授权
    Method of manufacturing a silicon on insulator semiconductor 失效
    硅绝缘子半导体制造方法

    公开(公告)号：US5028558A

    公开(公告)日：1991-07-02

    申请号：US336170

    申请日：1989-04-11

    申请人： Jan Haisma ,  Cornelis L. Adema ,  Johan G. De Bruin ,  Theodorus M. Michielsen ,  Gijsbertus A. C. M. Spierings

    发明人： Jan Haisma ,  Cornelis L. Adema ,  Johan G. De Bruin ,  Theodorus M. Michielsen ,  Gijsbertus A. C. M. Spierings

    IPC分类号： H01L21/306 ,  H01L21/02 ,  H01L21/18 ,  H01L21/20 ,  H01L21/304 ,  H01L27/12

    CPC分类号： H01L21/187 ,  H01L21/2007 ,  H01L21/304 ,  Y10S148/012

    摘要： A method of manufacturing a silicon-on-insulator semiconductor body is characterized by the steps consisting in that a carrier body is temporarily connected to a supporting body with accurately flat and parallel major surfaces and having a thickness of at least 1/8 of the largest dimension of the carrier body, in that the free major surface of the carrier body is mechanically polished to a precision of at least 1/2 .mu.m flatness, in that the carrier body is detached from the supporting body and the polished major surface is temporarily connected to the supporting body and the other major surface of the carrier body is mechanically polished to a precision of at least 1/2 .mu.m flatness and a parallelism between the major surfaces of at least 1/2 .mu.m whereupon a semiconductor body is connected through a major surface permanently to a major surface of the carrier body, in that then the semiconductor body is mechanically ground to a thickness of at least 50 .mu.m larger than the desired ultimate layer thickness and is then alternately polished tribochemically and mechanically to a thickness of about 10 .mu.m larger than the ultimately desired layer thickness, and in that there is ultimately polished tribochemically until the desired layer thickness of the semiconductor body is attained.

    Method of manufacturing a multilayer electronic component
    2.
    发明授权
    Method of manufacturing a multilayer electronic component 失效
    多层电子部件的制造方法

    公开(公告)号：US5997800A

    公开(公告)日：1999-12-07

    申请号：US179165

    申请日：1998-10-26

    申请人： Reinhold Wimberger Friedl ,  Peter P. Koets ,  Johan G. De Bruin

    发明人： Reinhold Wimberger Friedl ,  Peter P. Koets ,  Johan G. De Bruin

    IPC分类号： B29C47/06 ,  B32B18/00 ,  C04B35/622 ,  H01G4/20 ,  H01G4/30 ,  H01L41/083 ,  H01L41/273 ,  H01L41/333 ,  C04B35/64

    CPC分类号： H01G4/20 ,  H01G4/30 ,  H01L41/083 ,  H01L41/273 ,  H01L41/333 ,  Y10T29/435

    摘要： A method of manufacturing a ceramic multilayer component, comprising electrically conductive and electrically insulating layers which are stacked in alternate arrangement in a multilayer structure, which method comprises the following steps:providing three extrudable polymeric mixtures, each mixture comprising a binder and a particulate filler, whereby:(a) a first mixture comprises a ceramic filler;(b) a second mixture comprises a metallic filler and a first binder;(c) the third mixture comprises a metallic filler and a second binder;with the aid of an extrusion device having an extrusion channel which is provided with a layer-multiplication element, manufacturing an extruded multilayer stack comprising a plurality of the basic units abac, in which layers a,b,c correspond respectively to the first, second and third mixtures, the stack having two oppositely situated side walls along which part of each layer is exposed;with the aid of a first solvent, dissolving away part of each layer b exposed along a first side wall of the multilayer stack, thereby creating open channels along the first side wall;with the aid of a second solvent, dissolving away part of each layer c exposed along the second side wall of the multilayer stack, thereby creating open channels along the second side wall;firing and sintering the multilayer stack;providing electrical contact layers along both side walls, which contact layers contact the exposed layers in each side wall.

    摘要翻译： 一种制造陶瓷多层组件的方法，包括以多层结构交替布置的导电和电绝缘层，该方法包括以下步骤：提供三种可挤出的聚合物混合物，每种混合物包含粘合剂和颗粒填料， 由此：（a）第一混合物包含陶瓷填料; （b）第二混合物包含金属填料和第一粘合剂; （c）第三混合物包含金属填料和第二粘合剂; 借助于具有挤压通道的挤出装置，该挤压通道设置有层增加元件，制造包括多个基本单元abac的挤出多层堆叠，其中层a，b，c分别对应于第一，第二 和第三混合物，所述堆叠具有两个相对设置的侧壁，每层的一部分沿着该侧壁露出; 借助于第一溶剂，将沿着多层堆叠的第一侧壁暴露的每个层b的一部分溶解，从而沿着第一侧壁形成开放的通道; 借助于第二溶剂，将沿着多层堆叠的第二侧壁暴露的每个层c的一部分溶解，由此沿着第二侧壁形成开放的通道; 烧结和烧结多层堆叠; 沿着两个侧壁提供电接触层，所述接触层接触每个侧壁中的暴露层。