公开(公告)号：US10216050B2

公开(公告)日：2019-02-26

申请号：US14993235

申请日：2016-01-12

Applicant: JAPAN DISPLAY INC.

Inventor： Takamitsu Fujimoto

IPC: G02F1/1333 ,  G02F1/1345 ,  G02F1/1362

Abstract: In one embodiment, an array substrate includes an active area in the shape of a rectangle, and first, second third and fourth end portions, surrounding the active area. A source control circuit is electrically connected with one end of the source lines drawn to the third end portion from the active area. First and second common terminals of a common potential are formed in the first end portion. A power supply line is electrically connected with the first common terminal and extends along the second, third and fourth end portions in this order, and connected with the second common terminal. A branch wiring is electrically connected with an intermediate portion of the electric power supply line and the source control circuit, and extending in the first direction.

公开(公告)号：US20150162352A1

公开(公告)日：2015-06-11

申请号：US14560229

申请日：2014-12-04

Applicant: Japan Display Inc.

Inventor： Takamitsu Fujimoto ,  Tetsuya Iizuka

IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/1368

CPC classification number: H01L27/124 ,  G02F1/1345 ,  H01L27/1222

Abstract: According to one embodiment, a wiring substrate includes a pad group of a first pad to supply a power source voltage of low level, a second pad to supply a power source voltage of high level, and a third pad to supply a necessary signal for displaying an image, a common line, a first connection line to connect the first pad with the common line, a second connection line to connect the second pad with the common line, and a third connection line to connect the third pad with the common line, wherein the first connection line and the second connection line are formed of polysilicon in which no impurity is doped, and the third connection line and the common line are formed of polysilicon in which an impurity is doped.

Abstract translation: 根据一个实施例，布线基板包括用于提供低电平的电源电压的第一焊盘的焊盘组，提供高电平的电源电压的第二焊盘和用于提供用于显示的必要信号的第三焊盘 图像，公共线，将第一焊盘与公共线连接的第一连接线，将第二焊盘与公共线连接的第二连接线以及将第三焊盘与公共线连接的第三连接线， 其中所述第一连接线和所述第二连接线由其中不掺杂杂质的多晶硅形成，并且所述第三连接线和所述公共线由掺杂杂质的多晶硅形成。

公开(公告)号：US09548322B2

公开(公告)日：2017-01-17

申请号：US14560229

申请日：2014-12-04

Applicant: Japan Display Inc.

Inventor： Takamitsu Fujimoto ,  Tetsuya Iizuka

IPC: H01L27/01 ,  H01L27/12 ,  G02F1/1345

CPC classification number: H01L27/124 ,  G02F1/1345 ,  H01L27/1222

Abstract: According to one embodiment, a wiring substrate includes a pad group of a first pad to supply a power source voltage of low level, a second pad to supply a power source voltage of high level, and a third pad to supply a necessary signal for displaying an image, a common line, a first connection line to connect the first pad with the common line, a second connection line to connect the second pad with the common line, and a third connection line to connect the third pad with the common line, wherein the first connection line and the second connection line are formed of polysilicon in which no impurity is doped, and the third connection line and the common line are formed of polysilicon in which an impurity is doped.

Abstract translation: 根据一个实施例，布线基板包括用于提供低电平的电源电压的第一焊盘的焊盘组，提供高电平的电源电压的第二焊盘和用于提供用于显示的必要信号的第三焊盘 图像，公共线，将第一焊盘与公共线连接的第一连接线，将第二焊盘与公共线连接的第二连接线以及将第三焊盘与公共线连接的第三连接线， 其中所述第一连接线和所述第二连接线由其中不掺杂杂质的多晶硅形成，并且所述第三连接线和所述公共线由掺杂杂质的多晶硅形成。