公开(公告)号：US5933458A

公开(公告)日：1999-08-03

申请号：US608091

申请日：1996-02-28

Applicant: Patrice Leurent ,  Jean-Pierre Lagarde

Inventor： Patrice Leurent ,  Jean-Pierre Lagarde

IPC: H04L25/03 ,  H04L7/04 ,  H04L25/06 ,  H04N7/025 ,  H04N7/03 ,  H04N7/035 ,  H04N7/087 ,  H03L5/00 ,  H04L27/10

CPC classification number: H04N7/0355 ,  H04L25/063

Abstract: A circuit for restoring bits transmitted by an asynchronous signal includes a first comparator for comparing the level of the asynchronous signal with a first threshold adjusted as a function of the output of the first comparator during synchronization bursts of the asynchronous signal, and at least a second comparator for comparing the level of the asynchronous signal with a second threshold correlated to the first threshold.

Abstract translation: 用于恢复由异步信号发送的位的电路包括第一比较器，用于将异步信号的电平与在异步信号的同步脉冲串期间作为第一比较器的输出的函数调整的第一阈值进行比较，并且至少第二比较器 比较器，用于将异步信号的电平与与第一阈值相关的第二阈值进行比较。

公开(公告)号：US08054930B2

公开(公告)日：2011-11-08

申请号：US10841705

申请日：2004-05-07

Applicant: Jean-Pierre Lagarde

Inventor： Jean-Pierre Lagarde

IPC: H03D3/24

CPC classification number: H03L7/0994

Abstract: A circuit is provided for clock recovery. The circuit includes a reference extraction unit for extracting from a datastream time references defining a reference time base, and a digital Phase Locked Loop including a first programmable counter in the guise of a digitally controlled oscillator for overseeing an output time base, a second programmable counter in the guise of a loop divider for overseeing a loop time base, and a dedicated processor capable of executing a program including a first software module in the guise of a phase comparator for comparing values of the loop and reference time bases and generating a loop error, and a second software module in the guise of a loop filter for producing an adaptation value of an increment value of the first programmable counter from the loop error. Also provided are a user terminal and a method for clock recovery.

Abstract translation: 提供电路用于时钟恢复。 该电路包括：参考提取单元，用于从数据流中提取定义参考时基的参考时间;以及数字锁相环，包括用于监视输出时基的数字控制振荡器的伪装的第一可编程计数器，第二可编程计数器 用于监视循环时基的循环分配器的伪装，以及能够执行包括第一软件模块的程序的专用处理器，该第一软件模块用于比较循环和参考时基的值，并产生循环误差 以及环路滤波器的伪装的第二软件模块，用于从循环误差产生第一可编程计数器的增量值的自适应值。 还提供了用于时钟恢复的用户终端和方法。

公开(公告)号：US5943098A

公开(公告)日：1999-08-24

申请号：US931711

申请日：1997-09-16

Applicant: Jean-Pierre Lagarde ,  Patrice Leurent

Inventor： Jean-Pierre Lagarde ,  Patrice Leurent

IPC: H04N5/44 ,  H04N7/01

CPC classification number: H04N7/0122

Abstract: The present invention relates to a device for converting a television image format including two memories for storing image lines, alternatively switched in the read and write mode, and a control circuit issuing to these memories a first write frequency and a second read frequency, the control circuit including programmable means for generating said frequencies controlled by a horizontal synchronization signal, the read frequency being programmed to follow a predefined variation law having a period corresponding to the duration of one scanning line.

Abstract translation: 本发明涉及一种用于转换电视图像格式的装置，该装置包括用于存储图像行的两个存储器，交替地以读取和写入模式切换;以及控制电路，向这些存储器发出第一写入频率和第二读取频率，该控制 电路包括用于产生由水平同步信号控制的所述频率的可编程装置，所述读取频率被编程为遵循具有对应于一条扫描线的持续时间的周期的预定变化规律。