公开(公告)号：US5388266A

公开(公告)日：1995-02-07

申请号：US860797

申请日：1992-03-30

申请人： Jeffrey A. Frey ,  Ronald F. Hill ,  Jeffrey M. Nick ,  Michael D. Swanson ,  Ambrose A. Verdibello, Jr.

发明人： Jeffrey A. Frey ,  Ronald F. Hill ,  Jeffrey M. Nick ,  Michael D. Swanson ,  Ambrose A. Verdibello, Jr.

IPC分类号： G06F15/17 ,  G06F17/30 ,  G06F12/08

CPC分类号： G06F17/30952

摘要： Method and apparatus for creating and accessing data objects stored in a portion of the main memory of a data processing system which is inaccessible to programs. The data processing system includes a central processor for executing programs for processing data and a main memory for storing data and programs. The main memory is divided into a program accessible portion and a program inaccessible portion. Vector control objects and vector entries are stored in the program inaccessible portion of the main memory, with each vector entry having states the meaning of which are program defined. Tokens are generated to locate vector control objects in the program inaccessible portion of the main memory. Each vector control object includes a field for pointing to a vector entry for accessing and making observable to the central processor, the contents of a vector entry for indicating the status therein. The present invention also provides for the serialization of access to stored data objects such that the data objects may be released and reused without the possibility of a latent access to an object which is being reused.

摘要翻译： 用于创建和访问存储在程序不可访问的数据处理系统的主存储器的一部分中的数据对象的方法和装置。 数据处理系统包括用于执行用于处理数据的程序的中央处理器和用于存储数据和程序的主存储器。 主存储器被分为程序可访问部分和程序不可访问部分。 向量控制对象和向量条目存储在主存储器的程序不可访问部分中，每个向量条目具有其程序定义的含义的状态。 生成令牌以在主存储器的程序不可访问部分中定位矢量控制对象。 每个矢量控制对象包括用于指向用于访问并使其可观察到中央处理器的向量条目的字段，用于指示其中的状态的向量条目的内容。 本发明还提供对存储的数据对象的访问的序列化，使得数据对象可以被释放和重用，而没有潜在访问被重用的对象的可能性。

公开(公告)号：US06854021B1

公开(公告)日：2005-02-08

申请号：US09677454

申请日：2000-10-02

申请人： Donald W. Schmidt ,  John A. Aiken, Jr. ,  Frank W. Brice, Jr. ,  Janet R. Easton ,  Wolfgang Eckert ,  Marcus Eder ,  Steven G. Glassen ,  Jeffrey P. Kubala ,  Jeffrey M. Nick ,  Jerry W. Stevens ,  Ambrose A. Verdibello, Jr. ,  Harry M. Yudenfriend ,  Heinrich K. Lindner

发明人： Donald W. Schmidt ,  John A. Aiken, Jr. ,  Frank W. Brice, Jr. ,  Janet R. Easton ,  Wolfgang Eckert ,  Marcus Eder ,  Steven G. Glassen ,  Jeffrey P. Kubala ,  Jeffrey M. Nick ,  Jerry W. Stevens ,  Ambrose A. Verdibello, Jr. ,  Harry M. Yudenfriend ,  Heinrich K. Lindner

IPC分类号： G06F3/06 ,  G06F9/46 ,  G06F13/14 ,  H04L12/56

CPC分类号： G06F3/0656 ,  G06F3/0613 ,  G06F3/0635 ,  G06F3/067 ,  G06F9/546 ,  H04L49/90

摘要： Method and apparatus for sending data from one partition to a second partition within a logically partitioned computer. In a data processing system having multiple logical partitions, a send queue is established in the first logical partition, and a receive queue is established in the second logical partition. The send queue is registered in the send queue in a lookup table available to all of the logical partitions. The send queue is registered using as a key the logical partition identification of the first logical partition and the subchannel number (LPAR-ID.SUBCHANNEL#) of the subchannel assigned to the partition. The receive queue is registered in the lookup table using as a key, the internet protocol address of the receive queue in the second partition. A send instruction from the first logical partition is executed which interrogates the lookup table using the LPAR-ID.SUBCHANNEL# key to locate the send queue and IP address key to locate the receive queue, and sends the data in the send queue in the first logical partition to the receive queue in the second logical partition. This method and apparatus provides that discrete servers may be used in each logical partition, and data may be transferred between while maintaining security between the logical partitions.

摘要翻译： 将数据从一个分区发送到逻辑分区计算机内的第二分区的方法和装置。 在具有多个逻辑分区的数据处理系统中，在第一逻辑分区中建立发送队列，并且在第二逻辑分区中建立接收队列。 发送队列在可用于所有逻辑分区的查找表中的发送队列中注册。 使用分配给分区的子信道的第一逻辑分区和子信道号（LPAR-ID.SUBCHANNEL＃）的逻辑分区标识作为密钥来注册发送队列。 接收队列使用密钥（在第二分区中的接收队列的因特网协议地址）登记在查找表中。 执行来自第一逻辑分区的发送指令，其使用LPAR-ID.SUBCHANNEL＃密钥查询查找表来定位发送队列和IP地址密钥以定位接收队列，并且在第一逻辑分区中发送数据在发送队列中 逻辑分区到第二个逻辑分区中的接收队列。 该方法和装置提供了可以在每个逻辑分区中使用离散服务器，并且可以在保持逻辑分区之间的安全性的同时传送数据。

公开(公告)号：US06671733B1

公开(公告)日：2003-12-30

申请号：US09534679

申请日：2000-03-24

申请人： Richard K. Errickson ,  Ambrose A. Verdibello, Jr.

发明人： Richard K. Errickson ,  Ambrose A. Verdibello, Jr.

IPC分类号： G06F1750

CPC分类号： H04L29/06 ,  H04L69/32 ,  Y10S707/99945

摘要： A method and apparatus that provide connectivity in a computer network environment that includes a plurality of nodes, interface links and at least one central electronic complex divided into one or more physical and or virtual sub-environments. A first control program is provided in the central electronic complex in order to establish a first command process layer and a first transfer process layer within this first control program for handling data. The first command process layer is then linked to the first transfer process layer in this control program. A second control program is also provided in the central electronic complex in order to establish a second command process layer and a second transfer process layer within this second control program for handling data. The second command process layer is also linked to the second transfer layer in said second control program. Ultimately a link is emulated between the first transfer process layer and the second transfer process layer; and a physical interface is provided between the first transfer process layer and the second transfer process layer without affecting any of the logical interface(s) between the transfer process layers.

摘要翻译： 在计算机网络环境中提供连接性的方法和装置，其包括多个节点，接口链路以及分成一个或多个物理和/或虚拟子环境的至少一个中央电子综合体。 在中央电子综合体中提供第一控制程序，以便在该第一控制程序内建立第一命令处理层和第一传送处理层以处理数据。 然后，第一命令处理层被链接到该控制程序中的第一传送处理层。 在中央电子综合体中还提供第二控制程序，以在该第二控制程序内建立第二命令处理层和第二传送处理层来处理数据。 第二命令处理层也与所述第二控制程序中的第二传送层相连。 最终在第一转移处理层和第二转移处理层之间仿真一个链接; 并且在第一传送处理层和第二传送处理层之间提供物理接口，而不会影响传送处理层之间的任何逻辑接口。

公开(公告)号：US08225280B2

公开(公告)日：2012-07-17

申请号：US12058034

申请日：2008-03-28

申请人： Richard K. Errickson ,  Leonard W. Helmer, Jr. ,  John S. Houston ,  R. Timothy Tomaselli ,  Ambrose A. Verdibello, Jr.

发明人： Richard K. Errickson ,  Leonard W. Helmer, Jr. ,  John S. Houston ,  R. Timothy Tomaselli ,  Ambrose A. Verdibello, Jr.

IPC分类号： G06F9/44

CPC分类号： G06F9/546 ,  G06F2209/548

摘要： A computer program product for incorporating state machine controls into existing non-state machine environments includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes determining a state machine representation for an existing environment, assigning state indicators to each state of the state machine, transcoding existing software flags of the environment into modifier values associated with the state indicators, assigning state values based on the modifier values and the state indicators, assigning event identifiers for transitions from the state values, and creating a tabular representation of the determined state machine, the tabular representation providing next state information based on the event identifiers and the state values.

摘要翻译： 用于将状态机控制结合到现有非状态机器环境中的计算机程序产品包括可由处理电路读取的有形存储介质，并且存储由处理电路执行以执行方法的指令。 该方法包括确定现有环境的状态机表示，将状态指示符分配给状态机的每个状态，将现有环境的软件标志转码为与状态指示符相关联的修改值，基于修改值分配状态值，以及 状态指示符，从状态值分配用于转换的事件标识符，以及创建所确定的状态机的表格表示，表格表示基于事件标识符和状态值来提供下一状态信息。

公开(公告)号：US5574945A

公开(公告)日：1996-11-12

申请号：US477926

申请日：1995-06-07

申请人： David A. Elko ,  Gottfried A. Goldrian ,  Steven N. Goss ,  Thomas A. Gregg ,  Audrey A. Helffrich ,  Ambrose A. Verdibello, Jr.

发明人： David A. Elko ,  Gottfried A. Goldrian ,  Steven N. Goss ,  Thomas A. Gregg ,  Audrey A. Helffrich ,  Ambrose A. Verdibello, Jr.

IPC分类号： G06F11/00 ,  G06F15/163

CPC分类号： G06F11/141 ,  G06F11/0724 ,  G06F11/073 ,  G06F11/0772

摘要： A computer system with a coupling facility is provided with a plurality of processors and a plurality of intersystem channels coupled to the processors via a memory bus. The coupling facility includes a memory bus interface for the memory bus and a plurality of channels for coupling said channels to said processors. The memory bus interface includes an adapter with at least two hardware vectors provided for command detection, command isolation, and parallel testing of the error states of the intersystem channels, one which detects a command vector arrival, and a second which contains error state vector indicators. A LOCATE CHANNEL BUFFER (LCB) instruction is employed which performs a sense and reset operation on the command vector to identify and isolate a new command, and subsequently reads a vector of said error states vector indicator to determine the presence or absence of link errors.

摘要翻译： 具有耦合设施的计算机系统设置有多个处理器和经由存储器总线耦合到处理器的多个系统间通道。 耦合设备包括用于存储器总线的存储器总线接口和用于将所述通道耦合到所述处理器的多个通道。 存储器总线接口包括具有至少两个硬件向量的适配器，用于命令检测，命令隔离和并行测试系统间通道的错误状态，检测命令向量到达的错误状态，以及包含错误状态向量指示器的第二个 。 使用LOCATE CHANNEL BUFFER（LCB）指令，对命令向量执行感测和复位操作，以识别和隔离新命令，随后读取所述错误状态向量指示符的向量，以确定是否存在链路错误。

公开(公告)号：US08762125B2

公开(公告)日：2014-06-24

申请号：US12036986

申请日：2008-02-25

申请人： Richard K. Errickson ,  Thomas A. Gregg ,  John S. Houston ,  Ambrose A. Verdibello, Jr.

发明人： Richard K. Errickson ,  Thomas A. Gregg ,  John S. Houston ,  Ambrose A. Verdibello, Jr.

IPC分类号： G06F9/455 ,  G06F13/10 ,  G06F9/54 ,  H04L12/56

CPC分类号： G06F13/105 ,  G06F9/544 ,  G06F9/546 ,  H04L49/901

摘要： A computer program product, apparatus and method for emulating channels in a multi-tasking multi-processor environment, including identifying a plurality of physical channels having an associated physical channel identifier for each of the plurality of physical channels, associating an emulated channel from a plurality of emulated channels for each of the plurality of physical channels, thereby generating a plurality of emulated channels, each of the plurality of emulated channels having a virtual channel identifier, mapping the plurality of emulated channels on a communications link, thereby generating an emulated channel path for each of the plurality of emulated channels, defining a queue pair link buffer from a plurality of queue pair link buffers for each of the emulated channels and increasing a number of queue pair link buffers.

摘要翻译： 一种用于在多任务多处理器环境中模拟信道的计算机程序产品，装置和方法，包括识别具有用于多个物理信道中的每一个的相关联的物理信道标识符的多个物理信道，将来自多个 用于生成多个仿真信道，多个仿真信道中的每一个具有虚拟信道标识符，在通信链路上映射多个仿真信道，从而生成仿真信道路径 对于多个仿真信道中的每一个，为每个仿真信道的多个队列对链路缓冲器定义队列对链路缓冲器，并增加队列对链路缓冲器的数量。

公开(公告)号：US08429662B2

公开(公告)日：2013-04-23

申请号：US12058054

申请日：2008-03-28

申请人： Leonard W. Helmer, Jr. ,  John S. Houston ,  Ambrose A. Verdibello, Jr.

发明人： Leonard W. Helmer, Jr. ,  John S. Houston ,  Ambrose A. Verdibello, Jr.

IPC分类号： G06F9/46

CPC分类号： G06F9/546 ,  G06F2209/548

摘要： A computer program product for passing initiative in a multitasking multiprocessor environment includes a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method. The method includes writing a request to process a resource of the environment to an associated resource control block, setting a resource flag in a central bit vector, the resource flag indicating that a request for processing has been received for the resource, and setting a target processor initiative flag in the environment, the target processor initiative flag indicating a pass of initiative to a target processor responsible for the resource.

摘要翻译： 用于在多任务多处理器环境中主动进行的计算机程序产品包括可由处理电路读取的有形存储介质，并且存储由处理电路执行以执行方法的指令。 该方法包括：向相关联的资源控制块写入处理环境的资源的请求，将中心位向量中的资源标志设置为指示已经为资源接收到处理请求的资源标志，以及设置目标 处理器主动标志在环境中，目标处理器主动标志指示主动通过负责该资源的目标处理器。