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公开(公告)号：US07493584B1
公开(公告)日：2009-02-17
申请号：US11354218
申请日：2006-02-13
IPC分类号： G06F17/50
CPC分类号： G06F17/5045
摘要： Methods and apparatus are provided for efficiently implementing a programmable chip using hardware description source files passed through multiple tools. A hardware description language source file is provided with mechanisms to allow tool-specific code to be handled by both a synthesis tool and by a simulation tool. Instructions are provided to direct a synthesis tool to read as code comments that a simulation tool is configured to disregard.
摘要翻译： 提供了使用通过多个工具传递的硬件描述源文件来有效地实现可编程芯片的方法和装置。 硬件描述语言源文件提供有允许特定于工具的代码由综合工具和仿真工具来处理的机制。 提供说明以指导综合工具读取模拟工具被配置为忽略的代码注释。
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2.发明授权Methods and apparatus for implementing parameterizable processors and peripherals 有权用于实现可参数化处理器和外设的方法和设备公开(公告)号：US06976239B1
公开(公告)日：2005-12-13
申请号：US09880106
申请日：2001-06-12
IPC分类号： G06F17/50
CPC分类号： G06F17/5045
摘要： Methods and apparatus are provided for implementing parameterizable processor cores and peripherals on a programmable chip. An input interface such as a wizard allows selection and parameterization of processor cores, peripherals, as well as other modules. The logic description for implementing the modules on a programmable chip can be dynamically generated, allowing extensive parameterization of various modules. Dynamic generation also allows the delivery of device driver logic onto a programmable chip. The logic description can include information for configuring a dynamically generated bus module to allow connectivity between the modules as well as connectivity with other on-chip and off-chip components. The logic description, possibly comprising HDL files, can then be automatically synthesized and provided to tools for downloading the logic description onto a programmable chip.
摘要翻译： 提供了用于在可编程芯片上实现可参数化处理器内核和外设的方法和装置。 诸如向导之类的输入接口允许选择和参数化处理器内核，外围设备以及其他模块。 可以动态地生成用于在可编程芯片上实现模块的逻辑描述，允许各种模块的大量参数化。 动态生成还允许将设备驱动器逻辑传递到可编程芯片上。 逻辑描述可以包括用于配置动态生成的总线模块以允许模块之间的连接以及与其他片上和片外组件的连接的信息。 然后可以包括HDL文件的逻辑描述被自动合成并提供给用于将逻辑描述下载到可编程芯片上的工具。
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3.发明授权Master and slave side arbitrators associated with programmable chip system components 有权与可编程芯片系统组件相关的主，从侧仲裁器公开(公告)号：US08082378B1
公开(公告)日：2011-12-20
申请号：US12819988
申请日：2010-06-21
申请人： Jeffrey Orion Pritchard , Tim Allen
发明人： Jeffrey Orion Pritchard , Tim Allen
IPC分类号： G06F13/00
CPC分类号： G06F13/364 , G06F13/374
摘要： Methods and apparatus are provided for providing a first master component with access to a first slave component while a second master component is accessing a second slave component in a system. The system may include a processor core and peripherals implemented on an integrated circuit. A slave side arbitrator corresponding to a single slave component and coupled to multiple master components can be used to provide a master component access to a slave component.
摘要翻译： 提供的方法和装置用于在第二主组件正在访问系统中的第二从组件时提供对第一从组件的访问的第一主组件。 该系统可以包括在集成电路上实现的处理器核心和外围设备。 可以使用对应于单个从属组件并且耦合到多个主组件的从属侧仲裁器来提供主组件对从组件的访问。
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4.发明授权Methods and apparatus for implementing parameterizable processors and peripherals 有权用于实现可参数化处理器和外设的方法和设备公开(公告)号：US07676784B2
公开(公告)日：2010-03-09
申请号：US11256311
申请日：2005-10-21
IPC分类号： G06F17/50
CPC分类号： G06F17/5045
摘要： Methods and apparatus are provided for implementing parameterizable processor cores and peripherals on a programmable chip. An input interface such as a wizard allows selection and parameterization of processor cores, peripherals, as well as other modules. The logic description for implementing the modules on a programmable chip can be dynamically generated, allowing extensive parameterization of various modules. Dynamic generation also allows the delivery of device driver logic onto a programmable chip. The logic description can include information for configuring a dynamically generated bus module to allow connectivity between the modules as well as connectivity with other on-chip and off-chip components. The logic description, possibly comprising HDL files, can then be automatically synthesized and provided to tools for downloading the logic description onto a programmable chip.
摘要翻译： 提供了用于在可编程芯片上实现可参数化处理器内核和外设的方法和装置。 诸如向导之类的输入接口允许选择和参数化处理器内核，外围设备以及其他模块。 可以动态地生成用于在可编程芯片上实现模块的逻辑描述，允许各种模块的大量参数化。 动态生成还允许将设备驱动器逻辑传递到可编程芯片上。 逻辑描述可以包括用于配置动态生成的总线模块以允许模块之间的连接以及与其他片上和片外组件的连接的信息。 然后可以包括HDL文件的逻辑描述被自动合成并提供给用于将逻辑描述下载到可编程芯片上的工具。
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5.发明授权Master and slave side arbitrators associated with programmable chip system components 有权与可编程芯片系统组件相关的主，从侧仲裁器公开(公告)号：US07246185B1
公开(公告)日：2007-07-17
申请号：US11049141
申请日：2005-01-31
申请人： Jeffrey Orion Pritchard , Tim Allen
发明人： Jeffrey Orion Pritchard , Tim Allen
CPC分类号： G06F13/364 , G06F13/374
摘要： Methods and apparatus are provided for providing a first master component with access to a first slave component while a second master component is accessing a second slave component in a system. The system may include a processor core and peripherals implemented on an integrated circuit. A slave side arbitrator corresponding to a single slave component and coupled to multiple master components can be used to provide a master component access to a slave component.
摘要翻译： 提供的方法和装置用于在第二主组件正在访问系统中的第二从组件时提供对第一从组件的访问的第一主组件。 该系统可以包括在集成电路上实现的处理器核心和外围设备。 可以使用对应于单个从属组件并且耦合到多个主组件的从属侧仲裁器来提供主组件对从组件的访问。
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公开(公告)号：US08132132B2
公开(公告)日：2012-03-06
申请号：US11372550
申请日：2006-03-10
IPC分类号： G06F17/50
CPC分类号： G06F17/5045
摘要： Methods and apparatus are provided for implementing parameterizable processor cores and peripherals on a programmable chip. An input interface such as a wizard allows selection and parameterization of processor cores, peripherals, as well as other modules. The logic description for implementing the modules on a programmable chip can be dynamically generated, allowing extensive parameterization of various modules. Dynamic generation also allows the delivery of device driver logic onto a programmable chip. The logic description can include information for configuring a dynamically generated bus module to allow connectivity between the modules as well as connectivity with other on-chip and off-chip components. The logic description, possibly comprising HDL files, can then be automatically synthesized and provided to tools for downloading the logic description onto a programmable chip.
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7.发明授权Methods and apparatus for implementing parameterizable processors and peripherals 有权用于实现可参数化处理器和外设的方法和设备公开(公告)号：US08156455B2
公开(公告)日：2012-04-10
申请号：US11256239
申请日：2005-10-21
IPC分类号： G06F17/50
CPC分类号： G06F17/5045
摘要： Methods and apparatus are provided for implementing parameterizable processor cores and peripherals on a programmable chip. An input interface such as a wizard allows selection and parameterization of processor cores, peripherals, as well as other modules. The logic description for implementing the modules on a programmable chip can be dynamically generated, allowing extensive parameterization of various modules. Dynamic generation also allows the delivery of device driver logic onto a programmable chip. The logic description can include information for configuring a dynamically generated bus module to allow connectivity between the modules as well as connectivity with other on-chip and off-chip components. The logic description, possibly comprising HDL files, can then be automatically synthesized and provided to tools for downloading the logic description onto a programmable chip.
摘要翻译： 提供了用于在可编程芯片上实现可参数化处理器内核和外设的方法和装置。 诸如向导之类的输入接口允许选择和参数化处理器内核，外围设备以及其他模块。 可以动态地生成用于在可编程芯片上实现模块的逻辑描述，允许各种模块的大量参数化。 动态生成还允许将设备驱动器逻辑传递到可编程芯片上。 逻辑描述可以包括用于配置动态生成的总线模块以允许模块之间的连接以及与其他片上和片外组件的连接的信息。 然后可以包括HDL文件的逻辑描述被自动合成并提供给用于将逻辑描述下载到可编程芯片上的工具。
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8.发明授权Methods and apparatus for implementing parameterizable processors and peripherals 有权用于实现可参数化处理器和外设的方法和设备公开(公告)号：US08037434B2
公开(公告)日：2011-10-11
申请号：US11841715
申请日：2007-08-20
IPC分类号： G06F17/50
CPC分类号： G06F17/5045
摘要： Methods and apparatus are provided for implementing parameterizable processor cores and peripherals on a programmable chip. An input interface such as a wizard allows selection and parameterization of processor cores, peripherals, as well as other modules. The logic description for implementing the modules on a programmable chip can be dynamically generated, allowing extensive parameterization of various modules. Dynamic generation also allows the delivery of device driver logic onto a programmable chip. The logic description can include information for configuring a dynamically generated bus module to allow connectivity between the modules as well as connectivity with other on-chip and off-chip components. The logic description, possibly comprising HDL files, can then be automatically synthesized and provided to tools for downloading the logic description onto a programmable chip.
摘要翻译： 提供了用于在可编程芯片上实现可参数化处理器内核和外设的方法和装置。 诸如向导之类的输入接口允许选择和参数化处理器内核，外围设备以及其他模块。 可以动态地生成用于在可编程芯片上实现模块的逻辑描述，允许各种模块的大量参数化。 动态生成还允许将设备驱动器逻辑传递到可编程芯片上。 逻辑描述可以包括用于配置动态生成的总线模块以允许模块之间的连接以及与其他片上和片外组件的连接的信息。 然后可以包括HDL文件的逻辑描述被自动合成并提供给用于将逻辑描述下载到可编程芯片上的工具。
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9.发明申请METHODS AND APPARATUS FOR IMPLEMENTING PARAMETERIZABLE PROCESSORS AND PERIPHERALS 有权用于实施参数化处理器和外设的方法和装置公开(公告)号：US20080134127A1
公开(公告)日：2008-06-05
申请号：US11841715
申请日：2007-08-20
IPC分类号： G06F17/50
CPC分类号： G06F17/5045
摘要： Methods and apparatus are provided for implementing parameterizable processor cores and peripherals on a programmable chip. An input interface such as a wizard allows selection and parameterization of processor cores, peripherals, as well as other modules. The logic description for implementing the modules on a programmable chip can be dynamically generated, allowing extensive parameterization of various modules. Dynamic generation also allows the delivery of device driver logic onto a programmable chip. The logic description can include information for configuring a dynamically generated bus module to allow connectivity between the modules as well as connectivity with other on-chip and off-chip components. The logic description, possibly comprising HDL files, can then be automatically synthesized and provided to tools for downloading the logic description onto a programmable chip.
摘要翻译： 提供了用于在可编程芯片上实现可参数化处理器内核和外设的方法和装置。 诸如向导之类的输入接口允许选择和参数化处理器内核，外围设备以及其他模块。 可以动态地生成用于在可编程芯片上实现模块的逻辑描述，允许各种模块的大量参数化。 动态生成还允许将设备驱动器逻辑传递到可编程芯片上。 逻辑描述可以包括用于配置动态生成的总线模块以允许模块之间的连接以及与其他片上和片外组件的连接的信息。 然后可以包括HDL文件的逻辑描述被自动合成并提供给用于将逻辑描述下载到可编程芯片上的工具。
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公开(公告)号：US07036107B1
公开(公告)日：2006-04-25
申请号：US10461742
申请日：2003-06-12
IPC分类号： G06F17/50
CPC分类号： G06F17/5045
摘要： Methods and apparatus are provided for efficiently implementing a programmable chip using hardware description source files passed through multiple tools. A hardware description language source file is provided with mechanisms to allow tool-specific code to be handled by both a synthesis tool and by a simulation tool. Instructions are provided to direct a synthesis tool to read as code comments that a simulation tool is configured to disregard.
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