Method and structure for improving the gate resistance of a closed cell trench power MOSFET
    1.
    发明申请
    Method and structure for improving the gate resistance of a closed cell trench power MOSFET 审中-公开
    提高封闭沟槽功率MOSFET栅极电阻的方法和结构

    公开(公告)号:US20050040459A1

    公开(公告)日:2005-02-24

    申请号:US10647029

    申请日:2003-08-22

    摘要: A closed cell trench power MOSFET has a trench (54) running in first and second perpendicular directions through a body region (48) and extending into an epitaxial region (46). The trenches meet to form intersections (16). A polysilicon layer (58) is deposited in the trench. A photoresist pattern (60) is formed over the intersections to inhibit removal of the conductive material from the trench in and around the intersection areas. The process of inhibiting removal of the conductive material over the intersection areas of the trench prevents formation of a depression in the polysilicon in and around the intersection which would increase resistivity in the gate region. The goal of preventing formation of depressions in the polysilicon can also be achieved by making the polysilicon thicker on the intersections prior to the etching process and by making the trenches narrower in and around the intersections.

    摘要翻译: 闭孔沟槽功率MOSFET具有穿过体区(48)的第一和第二垂直方向上延伸并延伸到外延区域(46)中的沟槽(54)。 壕沟相交,形成十字路口(16)。 多晶硅层(58)沉积在沟槽中。 在交叉点之上形成光致抗蚀剂图案(60),以阻止导电材料从交叉区域内和周围的沟槽移除。 阻止在沟槽的交叉区域上去除导电材料的过程防止在交叉点中和周围的多晶硅中形成凹陷,这将增加栅极区域中的电阻率。 防止在多晶硅中形成凹陷的目的还可以通过在蚀刻工艺之前使交叉点上的多晶硅变厚,并且通过在交叉点内和周围使沟槽变窄来实现。