公开(公告)号：US06656751B2

公开(公告)日：2003-12-02

申请号：US09683050

申请日：2001-11-13

申请人： John E. Andersen ,  Bruce M. Cowan ,  Pamela S. Gillis ,  Steven F. Oakland ,  Michael R. Ouellette

发明人： John E. Andersen ,  Bruce M. Cowan ,  Pamela S. Gillis ,  Steven F. Oakland ,  Michael R. Ouellette

IPC分类号： H01L2100

CPC分类号： G11C29/12015 ,  G01R31/31724 ,  G01R31/3187 ,  G11C29/14 ,  H03K5/135

摘要： Disclosed is a device that includes a built-in-self-test controller having a mechanism for providing an interface signal that indicates whether a dynamic voltage screen (DVS) test is being performed. The self-test controller is associated with a memory array that includes a clock having a clock speed. The memory array also includes a clock adjuster that receives the interface signal and reduces the clock speed when the interface signal indicates that a DVS test is being performed.

摘要翻译： 公开了一种包括内置自检控制器的装置，其具有用于提供指示是否正在执行动态电压屏幕（DVS）测试的接口信号的机制。 自检控制器与包括具有时钟速度的时钟的存储器阵列相关联。 存储器阵列还包括时钟调节器，当接口信号指示正在执行DVS测试时，时钟调节器接收接口信号并降低时钟速度。