摘要:
A driving voltage generating circuit includes: a pulse voltage generating unit generating predetermined pulse voltages; a first voltage generating unit connected to the pulse voltage generating unit and generating a first voltage; a first diode unit and a second diode unit commonly connected to the pulse voltage generating unit and each comprising at least a diode; a second voltage generating unit connected to the first diode unit and generating a second voltage; and a third voltage generating unit connected to the second diode unit and generating a third voltage.
摘要:
A driving voltage generating circuit includes: a pulse voltage generating unit generating predetermined pulse voltages; a first voltage generating unit connected to the pulse voltage generating unit and generating a first voltage; a first diode unit and a second diode unit commonly connected to the pulse voltage generating unit and each comprising at least a diode; a second voltage generating unit connected to the first diode unit and generating a second voltage; and a third voltage generating unit connected to the second diode unit and generating a third voltage.
摘要:
A display device includes data lines transmitting data voltages, a signal controller processing image data from an external device and generating control signals, a gray voltage generator generating gray voltages, and a data driver selecting a gray voltage corresponding to image data from the signal controller and applying the gray voltages to the data lines as the data voltages. The signal controller compares present data with previous data of the image data and generates first to fourth mode setting signals for application to the data driver responsive to a result of the comparison.
摘要:
A gate drive portion for a display device including multiple pixels having first and second sub-pixels includes a first shift register generating a first output signal in response to a first gate clock signal, a second shift register generating a second output signal in response to a second gate clock signal, a level shifter coupled to the first and second shift registers and amplifying the first and second output signals, and an output buffer coupled to the level shifter and generating first and second gate signals. The first gate signal is generated in synchronization with the first gate clock signal and the second gate signal is generated in synchronization with the second gate clock signal. Accordingly, the charging time of the first and second sub-pixels may be improved by separately driving the odd-numbered and even-numbered sub-pixels and the visibility of the LCD device may also be improved.
摘要:
A liquid crystal display includes a liquid crystal panel assembly with a plurality of pixels, a printed circuit board disposed under the liquid crystal panel assembly, and a plurality of laser diodes disposed on the printed circuit board. The laser diodes are disposed to correspond to substantially respective pixels of the liquid crystal panel assembly. In another embodiment, the liquid crystal display includes a light-guiding layer formed on the laser diodes.
摘要:
A gate drive portion for a display device including multiple pixels having first and second sub-pixels includes a first shift register generating a first output signal in response to a first gate clock signal, a second shift register generating a second output signal in response to a second gate clock signal, a level shifter coupled to the first and second shift registers and amplifying the first and second output signals, and an output buffer coupled to the level shifter and generating first and second gate signals. The first gate signal is generated in synchronization with the first gate clock signal and the second gate signal is generated in synchronization with the second gate clock signal. Accordingly, the charging time of the first and second sub-pixels may be improved by separately driving the odd-numbered and even-numbered sub-pixels and the visibility of the LCD device may also be improved.
摘要:
A gate drive portion for a display device including multiple pixels having first and second sub-pixels includes a first shift register generating a first output signal in response to a first gate clock signal, a second shift register generating a second output signal in response to a second gate clock signal, a level shifter coupled to the first and second shift registers and amplifying the first and second output signals, and an output buffer coupled to the level shifter and generating first and second gate signals. The first gate signal is generated in synchronization with the first gate clock signal and the second gate signal is generated in synchronization with the second gate clock signal. Accordingly, the charging time of the first and second sub-pixels may be improved by separately driving the odd-numbered and even-numbered sub-pixels and the visibility of the LCD device may also be improved.
摘要:
A liquid crystal display includes a liquid crystal panel assembly with a plurality of pixels, a printed circuit board disposed under the liquid crystal panel assembly, and a plurality of laser diodes disposed on the printed circuit board. The laser diodes are disposed to correspond to substantially respective pixels of the liquid crystal panel assembly. In another embodiment, the liquid crystal display includes a light-guiding layer formed on the laser diodes.
摘要:
A liquid crystal display (LCD) including a liquid crystal panel, and a gate driver which applies a gate signal having a driving frequency equal to or greater than 100 Hz to the liquid crystal panel. The liquid crystal panel comprises a first display panel, a second display panel facing the first display panel, and a liquid crystal composition disposed between the first display panel and the second display panel and includes liquid crystals.
摘要:
A gamma voltage generator for a liquid crystal display (LCD) capable of removing residual images by compensating a gamma voltage is presented. The gamma voltage generation apparatus adjusts the common voltage by the kickback voltage for the intermediate gray level, and tunes the gamma voltages other than the intermediate gray level gamma voltage. The adjustment of the gamma voltages other than the intermediate gray level gamma voltage is achieved in such a manner that the difference between the intermediate gray level kickback voltage and the kickback voltage at one of the gray levels other than the intermediate gray level is equal to half of the difference between the sum of the two inverted gamma voltages representing the intermediate gray level gamma voltages and the sum of the two inverted gamma voltages corresponding to the selected gray level.