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公开(公告)号:US20210090633A1
公开(公告)日:2021-03-25
申请号:US16803260
申请日:2020-02-27
Applicant: KIOXIA CORPORATION
Inventor: Rui ITO , Makoto MORIMOTO , Yutaka SHIMIZU , Ryuichi FUJIMOTO
IPC: G11C11/4074 , G11C11/408 , G11C11/4076 , G11C16/34 , G11C7/10
Abstract: According to one embodiment, a semiconductor memory device includes a plurality of memory cells connected to a word line, a circuit configured to apply a voltage to the word line, a detection circuit configured to detect a first time difference from when a first signal of which a voltage is increased with a first slope is applied to the word line to when a current flows through the memory cells in response to applying the first signal, and a second time difference from when a second signal of which a voltage is increased with a second slope is applied to the word line to when a current flows through the memory cells in response to applying the second signal, the second slope being different from the first slope, and a determination circuit configured to determine a threshold voltage of the memory cells based on a difference between the first time difference and the second time difference.
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公开(公告)号:US20220302817A1
公开(公告)日:2022-09-22
申请号:US17475498
申请日:2021-09-15
Applicant: Kioxia Corporation
Inventor: Makoto MORIMOTO , Rui ITO , Ryuichi FUJIMOTO
Abstract: A power supply circuit has a first node, a second node, a DC-DC converter that includes a switched capacitor, generates an output voltage based on an input voltage supplied from the first node, and outputs the output voltage from the second node, and a regulator that is connected in parallel to the DC-DC converter between the first node and the second node and controls an output current flowing to the second node based on a reference voltage lower than the input voltage.
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