Process condition based dynamic defect inspection

    公开(公告)号:US10133263B1

    公开(公告)日:2018-11-20

    申请号:US14829503

    申请日:2015-08-18

    Inventor: Poh Boon Yong

    Abstract: Defect inspection methods and systems that use process conditions to dynamically determine how to perform defect inspections during a semiconductor manufacturing process are disclosed. A defect inspection method may include: obtaining process conditions from a process tool utilized to process at least one wafer; determining whether to perform defect inspection of a layer, a wafer, or a high risk area/spot within the at least one wafer based on the process conditions obtained; bypassing the defect inspection when it is determined not to perform the defect inspection; and performing the defect inspection after the at least one wafer is processed by the process tool when it is determined to perform the defect inspection.

    Defect review sampling and normalization based on defect and design attributes

    公开(公告)号:US10204290B2

    公开(公告)日:2019-02-12

    申请号:US15426138

    申请日:2017-02-07

    Inventor: Poh Boon Yong

    Abstract: A decision tree and normalized reclassification are used to classify defects. Defect review sampling and normalization can be used for accurate Pareto ranking and defect source analysis. A defect review system, such as a broadband plasma tool, and a controller can be used to bin defects using the decision tree based on defect attributes and design attributes. Class codes are assigned to at least some of the defects in each bin. Normalized reclassification assigns a class code to any unclassified defects in a bin. Additional decision trees can be used if any bin has more than one class code after normalized reclassification.

    Generating a wafer inspection process using bit failures and virtual inspection
    4.
    发明授权
    Generating a wafer inspection process using bit failures and virtual inspection 有权
    使用位故障和虚拟检查生成晶圆检查过程

    公开(公告)号:US09277186B2

    公开(公告)日:2016-03-01

    申请号:US13743074

    申请日:2013-01-16

    Abstract: Methods and systems for generating a wafer inspection process are provided. One method includes storing output of detector(s) of an inspection system during scanning of a wafer regardless of whether the output corresponds to defects detected on the wafer and separating physical locations on the wafer that correspond to bit failures detected by testing of the wafer into a first portion of the physical locations at which the defects were not detected and a second portion of the physical locations at which the defects were detected. In addition, the method includes applying defect detection method(s) to the stored output corresponding to the first portion of the physical locations to detect defects at the first portion of the physical locations and generating a wafer inspection process based on the defects detected by the defect detection method(s) at the first portion of the physical locations.

    Abstract translation: 提供了用于产生晶片检查过程的方法和系统。 一种方法包括在扫描晶片期间存储检查系统的检测器的输出,而不管输出是否对应于在晶片上检测到的缺陷,并且分离晶片上的物理位置,其对应于通过晶片测试检测到的位故障 未检测到缺陷的物理位置的第一部分和检测到缺陷的物理位置的第二部分。 此外,该方法包括将缺陷检测方法应用于与物理位置的第一部分相对应的存储的输出,以检测物理位置的第一部分处的缺陷,并基于由所述物理位置检测到的缺陷产生晶片检查过程 在物理位置的第一部分处的缺陷检测方法。

    Generating a Wafer Inspection Process Using Bit Failures and Virtual Inspection
    5.
    发明申请
    Generating a Wafer Inspection Process Using Bit Failures and Virtual Inspection 有权
    使用位故障和虚拟检查生成晶圆检测过程

    公开(公告)号:US20130182101A1

    公开(公告)日:2013-07-18

    申请号:US13743074

    申请日:2013-01-16

    Abstract: Methods and systems for generating a wafer inspection process are provided. One method includes storing output of detector(s) of an inspection system during scanning of a wafer regardless of whether the output corresponds to defects detected on the wafer and separating physical locations on the wafer that correspond to bit failures detected by testing of the wafer into a first portion of the physical locations at which the defects were not detected and a second portion of the physical locations at which the defects were detected. In addition, the method includes applying defect detection method(s) to the stored output corresponding to the first portion of the physical locations to detect defects at the first portion of the physical locations and generating a wafer inspection process based on the defects detected by the defect detection method(s) at the first portion of the physical locations.

    Abstract translation: 提供了用于产生晶片检查过程的方法和系统。 一种方法包括在扫描晶片期间存储检查系统的检测器的输出,而不管输出是否对应于在晶片上检测到的缺陷,并且分离晶片上的物理位置,其对应于通过晶片测试检测到的位故障 未检测到缺陷的物理位置的第一部分和检测到缺陷的物理位置的第二部分。 此外,该方法包括将缺陷检测方法应用于与物理位置的第一部分相对应的存储的输出,以检测物理位置的第一部分处的缺陷,并且基于由所述物理位置检测到的缺陷产生晶片检查过程 在物理位置的第一部分处的缺陷检测方法。

    Generating a Wafer Inspection Process Using Bit Failures and Virtual Inspection
    7.
    发明申请
    Generating a Wafer Inspection Process Using Bit Failures and Virtual Inspection 有权
    使用位故障和虚拟检查生成晶圆检测过程

    公开(公告)号:US20160163606A1

    公开(公告)日:2016-06-09

    申请号:US15041016

    申请日:2016-02-10

    Abstract: Methods and systems for generating a wafer inspection process are provided. One method includes storing output of detector(s) of an inspection system during scanning of a wafer regardless of whether the output corresponds to defects detected on the wafer and separating physical locations on the wafer that correspond to bit failures detected by testing of the water into a first portion of the physical locations at which the defects were not detected and a second portion of the physical locations at which the defects were detected. In addition, the method includes applying defect detection method(s) to the stored output corresponding to the first portion of the physical locations to detect defects at the first portion of the physical locations and generating a wafer inspection process based on the defects detected by the defect detection method(s) at the first portion of the physical locations.

    Abstract translation: 提供了用于产生晶片检查过程的方法和系统。 一种方法包括在扫描晶片期间存储检查系统的检测器的输出,而不管输出是否对应于在晶片上检测到的缺陷,并且将晶片上的物理位置分离成与水测试所检测到的位故障相对应 未检测到缺陷的物理位置的第一部分和检测到缺陷的物理位置的第二部分。 此外,该方法包括将缺陷检测方法应用于与物理位置的第一部分相对应的存储的输出,以检测物理位置的第一部分处的缺陷,并基于由所述物理位置检测到的缺陷产生晶片检查过程 在物理位置的第一部分处的缺陷检测方法。

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