公开(公告)号：US20030091224A1

公开(公告)日：2003-05-15

申请号：US10314030

申请日：2002-12-04

Applicant: KLA-Tencor Technologies Corporation

Inventor： James N. Wiley ,  Jun Ye ,  Shauh-Teh Juang ,  David S. Alles ,  Yen-Wen Lu ,  Yu Cao

IPC: G06K009/00

CPC classification number: G06T7/001 ,  G06T2207/30148

Abstract: Disclosed is a method of inspecting a reticle defining a circuit layer pattern that is used within a corresponding semiconductor process to generate corresponding patterns on a semiconductor wafer. A test image of the reticle is provided, and the test image has a plurality of test characteristic values. A baseline image containing an expected pattern of the test image is also provided. The baseline image has a plurality of baseline characteristic values that correspond to the test characteristic values. The test characteristic values are compared to the baseline characteristic values such that a plurality of difference values are calculated for each pair of test and baseline characteristic values. Statistical information is also collected.