公开(公告)号：US08748859B2

公开(公告)日：2014-06-10

申请号：US13441805

申请日：2012-04-06

申请人： Kang-Jay Hsia ,  Christopher J Petti ,  Calvin K Li

发明人： Kang-Jay Hsia ,  Christopher J Petti ,  Calvin K Li

IPC分类号： H01L29/02

CPC分类号： H01L27/1021

摘要： An integrated circuit including vertically oriented diode structures between conductors and methods of fabricating the same are provided. Two-terminal devices such as passive element memory cells can include a diode steering element in series with an antifuse and/or other state change element. The devices are formed using pillar structures at the intersections of upper and lower sets of conductors. The height of the pillar structures are reduced by forming part of the diode for each pillar in a rail stack with one of the conductors. A diode in one embodiment can include a first diode component of a first conductivity type and a second diode component of a second conductivity type. A portion of one of the diode components is divided into first and second portions with one on the portions being formed in the rail stack where it is shared with other diodes formed using pillars at the rail stack.

摘要翻译： 提供了一种在导体之间包括垂直取向的二极管结构的集成电路及其制造方法。 诸如无源元件存储单元的两端器件可以包括与反熔丝和/或其他状态改变元件串联的二极管操作元件。 这些装置在上下导体组的交点处使用支柱结构形成。 通过在轨道堆叠中的每个支柱的一个导体上形成二极管的一部分来减小柱结构的高度。 一个实施例中的二极管可以包括第一导电类型的第一二极管部件和第二导电类型的第二二极管部件。 二极管部件之一的一部分被分成第一和第二部分，其中一部分形成在轨道堆叠中，其中与在轨道堆叠处使用柱形成的其他二极管共用。

公开(公告)号：US07927990B2

公开(公告)日：2011-04-19

申请号：US11771137

申请日：2007-06-29

申请人： Kang-Jay Hsia ,  Calvin K Li ,  Christopher J Petti

发明人： Kang-Jay Hsia ,  Calvin K Li ,  Christopher J Petti

IPC分类号： H01L21/20

CPC分类号： H01L21/76838 ,  H01L21/76834 ,  H01L27/1021

摘要： A method is provided to form densely spaced metal lines. A first set of metal lines is formed by etching a first metal layer. A thin dielectric layer is conformally deposited on the first metal lines. A second metal is deposited on the thin dielectric layer, filling gaps between the first metal lines. The second metal layer is planarized to form second metal lines interposed between the first metal lines, coexposing the thin dielectric layer and the second metal layer at a substantially planar surface. In some embodiments, planarization continues to remove the thin dielectric covering tops of the first metal lines, coexposing the first metal lines and the second metal lines, separated by the thin dielectric layer, at a substantially planar surface.

摘要翻译： 提供了一种形成密集间隔的金属线的方法。 通过蚀刻第一金属层形成第一组金属线。 平坦地沉积在第一金属线上的薄介电层。 第二金属沉积在薄介电层上，填充第一金属线之间的间隙。 第二金属层被平坦化以形成插入在第一金属线之间的第二金属线，在基本上平坦的表面处共存薄介电层和第二金属层。 在一些实施例中，平面化继续移除第一金属线的薄电介质覆盖顶部，在基本上平坦的表面处将第一金属线和由薄介电层隔开的第二金属线并入。