公开(公告)号：US5224595A

公开(公告)日：1993-07-06

申请号：US788680

申请日：1991-11-06

申请人： Kenji Sugimoto ,  Koichi Nagase ,  Yoshimitsu Sekiguchi ,  Toshihiro Okada ,  Takehiko Kurusu

发明人： Kenji Sugimoto ,  Koichi Nagase ,  Yoshimitsu Sekiguchi ,  Toshihiro Okada ,  Takehiko Kurusu

IPC分类号： B28C5/40 ,  B28C7/04 ,  C04B24/00 ,  C04B28/02 ,  C04B40/00

CPC分类号： C04B28/02 ,  C04B40/0028 ,  C04B2103/0077 ,  Y02W30/97

摘要： Using a packaging material containing a fibrous substance such as pulp and a carboxyl-containing polymer a substance such as an acid type carboxymethyl cellulose, a cement mixing material such as a superplasticizer is packaged and the package is thrown into a cement formulation such as concrete, mortar or a cement paste in a truck agitator.

摘要翻译： 使用包含纤维状物质如纸浆和含羧基聚合物的包装材料，诸如酸型羧甲基纤维素等物质，包装如水泥混合材料如超增塑剂，并将包装物投入水泥制剂如混凝土， 砂浆或卡车搅拌器中的水泥浆。

公开(公告)号：US5373475A

公开(公告)日：1994-12-13

申请号：US924878

申请日：1992-08-06

申请人： Koichi Nagase

发明人： Koichi Nagase

IPC分类号： G11C11/401 ,  G11C11/406 ,  G11C11/407 ,  G11C11/409 ,  H01L21/8242 ,  H01L27/108 ,  G11C7/00

CPC分类号： G11C11/406

摘要： A refresh mode switching signal generating circuit generates a refresh mode switching signal of an H level or an L level depending on whether a particular bonding pad is wire-bonded to a power supply terminal of a package. In response to the refresh mode switching signal, the refresh mode switching circuit switches a cycle number in a refresh mode of a semiconductor memory device, so that the cycle number in a refresh mode can be changed according to requirements of users.

摘要翻译： 刷新模式切换信号生成电路根据特定的焊盘是否被引线接合到封装的电源端子来生成H电平或L电平的刷新模式切换信号。 响应于刷新模式切换信号，刷新模式切换电路切换半导体存储器件的刷新模式中的周期数，使得刷新模式中的周期数可以根据用户的要求而改变。

公开(公告)号：US5309398A

公开(公告)日：1994-05-03

申请号：US950243

申请日：1992-09-24

申请人： Koichi Nagase ,  Akio Nakayama ,  Tetsuya Aono ,  Yutaka Ikeda ,  Yoshinori Mizugai

发明人： Koichi Nagase ,  Akio Nakayama ,  Tetsuya Aono ,  Yutaka Ikeda ,  Yoshinori Mizugai

IPC分类号： G11C11/401 ,  G11C7/10 ,  G11C8/18 ,  G11C11/409 ,  G11C11/4096 ,  G11C7/00

CPC分类号： G11C7/1057 ,  G11C11/4096 ,  G11C7/1051 ,  G11C7/106 ,  G11C8/18 ,  G11C2207/108

摘要： An upper column address strobe signal and a lower column address strobe signal applied to a dynamic RAM are 180.degree. out of phase from each other. Data of n bits are read out from a memory cell array at a time. The data read out from memory cell array is divided into two bit groups and applied to an upper IO buffer and a lower IO buffer. Upper IO buffer and lower IO buffer latch sequentially the upper bit group and the lower bit group and output these groups to a data transmission bus in response to the upper column address strobe signal and the lower column address strobe signal.

摘要翻译： 施加到动态RAM的上列地址选通信号和下列列地址选通信号相互相差180度。 一次从存储单元阵列中读出n位的数据。 从存储单元阵列中读出的数据被分成两个位组，并被应用到上一个IO缓冲器和一个较低的IO缓冲器。 上IO缓冲器和下IO缓冲器顺序地锁存高位组和低位组，并响应于上列列地址选通信号和下列列地址选通信号将这些组输出到数据传输总线。